This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.
Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]
Re: i386 fabs/fchs patch

To: Richard Henderson <rth at cygnus dot com>
Subject: Re: i386 fabs/fchs patch
From: Jan Hubicka <hubicka at atrey dot karlin dot mff dot cuni dot cz>
Date: Fri, 19 Nov 1999 19:01:09 +0100
Cc: egcs-patches at egcs dot cygnus dot com
References: <19991119014226.48753@atrey.karlin.mff.cuni.cz> <19991119013202.F4016@cygnus.com> <19991119104020.24056@atrey.karlin.mff.cuni.cz> <19991119014656.G4016@cygnus.com>
> > Anyway exactly same problem is in fp-push pattern, that outputs "sub".
> 
> That doesn't use lea?
The output template uses just sub. But with shorten_branches it ought
to be splitted anyway so it is used only when not optimizing, where it probably
causes no harm.
My INDREG patches removes that output templates entirely.
> 
> > I will prepare a patch adding the clobber to the default "pre reload"
> > pattern and splitters to nonclobering "post reload". OK?
> 
> That would be fine.
So here it comes..

Fri Nov 18 18:51:14 CET 1999  Jan Hubicka  <hubicka@freesoft.cz>
	* i386.md (negs?2): Rewrite to expanders, new patterns and splitters
	to support integer registers and memory.
	(abss?2_integer): Likewise.

*** or/i386.md	Fri Nov 19 06:17:19 1999
--- i386.md	Fri Nov 19 11:25:10 1999
***************
*** 4770,4787 ****
    "neg{b}\\t%0"
    [(set_attr "type" "negnot")])
  
  (define_insn "negsf2"
    [(set (match_operand:SF 0 "register_operand" "=f")
  	(neg:SF (match_operand:SF 1 "register_operand" "0")))]
!   "TARGET_80387"
    "fchs"
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
  
! (define_insn "negdf2"
    [(set (match_operand:DF 0 "register_operand" "=f")
  	(neg:DF (match_operand:DF 1 "register_operand" "0")))]
!   "TARGET_80387"
    "fchs"
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
--- 4931,5050 ----
    "neg{b}\\t%0"
    [(set_attr "type" "negnot")])
  
+ ;; Changing of sign for FP values is duable using integer unit too.
+ 
  (define_insn "negsf2"
+   [(set (match_operand:SF 0 "nonimmediate_operand" "=frm")
+ 	(neg:SF (match_operand:SF 1 "nonimmediate_operand" "0")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:SF 0 "register_operand" "")
+ 	(neg:SF (match_operand:SF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
+   [(set (match_dup 0)
+ 	(neg:SF (match_dup 1)))]
+   "")
+ 
+ (define_split
+   [(set (match_operand:SF 0 "register_operand" "")
+ 	(neg:SF (match_operand:SF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
+   [(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[1] = GEN_INT (0x80000000);
+    operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));")
+ 
+ (define_split
+   [(set (match_operand 0 "memory_operand" "")
+ 	(neg (match_operand 1 "memory_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
+   [(parallel [(set (match_dup 0) (xor:QI (match_dup 0) (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "
+ {
+   int size = GET_MODE_SIZE (GET_MODE (operands[1]));
+ 
+   /* XFmode's size is 12, but only 10 bytes are used.  */
+   if (size == 12)
+     size = 10;
+   operands[0] = gen_rtx_MEM (QImode, XEXP (operands[0], 0));
+   operands[0] = adj_offsettable_operand (operands[0], size - 1);
+   operands[1] = GEN_INT (0x80);
+ }")
+ 
+ (define_insn "negdf2"
+   [(set (match_operand:DF 0 "nonimmediate_operand" "=frm")
+ 	(neg:DF (match_operand:DF 1 "nonimmediate_operand" "0")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:DF 0 "register_operand" "")
+ 	(neg:DF (match_operand:DF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
+   [(set (match_dup 0)
+ 	(neg:DF (match_dup 1)))]
+   "")
+ 
+ (define_split
+   [(set (match_operand:DF 0 "register_operand" "")
+ 	(neg:DF (match_operand:DF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
+   [(parallel [(set (match_dup 3) (xor:SI (match_dup 3) (match_dup 4)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[4] = GEN_INT (0x80000000);
+    split_di (operands+0, 1, operands+2, operands+3);")
+ 
+ (define_insn "negxf2"
+   [(set (match_operand:XF 0 "nonimmediate_operand" "=frm")
+ 	(neg:XF (match_operand:XF 1 "nonimmediate_operand" "0")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:XF 0 "register_operand" "")
+ 	(neg:XF (match_operand:XF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
+   [(set (match_dup 0)
+ 	(neg:XF (match_dup 1)))]
+   "")
+ 
+ (define_split
+   [(set (match_operand:XF 0 "register_operand" "")
+ 	(neg:XF (match_operand:XF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
+   [(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[1] = GEN_INT (0x8000);
+    operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]) + 2);")
+ 
+ ;; Conditionize these after reload. If they matches before reload, we 
+ ;; lose the clobber and ability to use integer instructions.
+ 
+ (define_insn "*negsf2_1"
    [(set (match_operand:SF 0 "register_operand" "=f")
  	(neg:SF (match_operand:SF 1 "register_operand" "0")))]
!   "TARGET_80387 && reload_completed"
    "fchs"
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
  
! (define_insn "*negdf2_1"
    [(set (match_operand:DF 0 "register_operand" "=f")
  	(neg:DF (match_operand:DF 1 "register_operand" "0")))]
!   "TARGET_80387 && reload_completed"
    "fchs"
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
***************
*** 4795,4804 ****
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
  
! (define_insn "negxf2"
    [(set (match_operand:XF 0 "register_operand" "=f")
  	(neg:XF (match_operand:XF 1 "register_operand" "0")))]
!   "TARGET_80387"
    "fchs"
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
--- 5058,5067 ----
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
  
! (define_insn "*negxf2_1"
    [(set (match_operand:XF 0 "register_operand" "=f")
  	(neg:XF (match_operand:XF 1 "register_operand" "0")))]
!   "TARGET_80387 && reload_completed"
    "fchs"
    [(set_attr "type" "fsgn")
     (set_attr "ppro_uops" "few")])
***************
*** 4824,4839 ****
  ;; Absolute value instructions
  
  (define_insn "abssf2"
    [(set (match_operand:SF 0 "register_operand" "=f")
  	(abs:SF (match_operand:SF 1 "register_operand" "0")))]
!   "TARGET_80387"
    "fabs"
    [(set_attr "type" "fsgn")])
  
! (define_insn "absdf2"
    [(set (match_operand:DF 0 "register_operand" "=f")
  	(abs:DF (match_operand:DF 1 "register_operand" "0")))]
!   "TARGET_80387"
    "fabs"
    [(set_attr "type" "fsgn")])
  
--- 5087,5198 ----
  ;; Absolute value instructions
  
  (define_insn "abssf2"
+   [(set (match_operand:SF 0 "nonimmediate_operand" "=frm")
+ 	(abs:SF (match_operand:SF 1 "nonimmediate_operand" "0")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:SF 0 "register_operand" "")
+ 	(abs:SF (match_operand:SF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && FP_REGNO_P (REGNO (operands[0]))"
+   [(set (match_dup 0)
+ 	(abs:SF (match_dup 1)))]
+   "")
+ 
+ (define_split
+   [(set (match_operand:SF 0 "register_operand" "")
+ 	(abs:SF (match_operand:SF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
+   [(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[1] = GEN_INT (~0x80000000);
+    operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));")
+ 
+ (define_split
+   [(set (match_operand 0 "memory_operand" "")
+ 	(abs (match_operand 1 "memory_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
+   [(parallel [(set (match_dup 0) (and:QI (match_dup 0) (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "
+ {
+   int size = GET_MODE_SIZE (GET_MODE (operands[1]));
+ 
+   /* XFmode's size is 12, but only 10 bytes are used.  */
+   if (size == 12)
+     size = 10;
+   operands[0] = gen_rtx_MEM (QImode, XEXP (operands[0], 0));
+   operands[0] = adj_offsettable_operand (operands[0], size - 1);
+   operands[1] = GEN_INT (~0x80);
+ }")
+ 
+ (define_insn "absdf2"
+   [(set (match_operand:DF 0 "nonimmediate_operand" "=frm")
+ 	(abs:DF (match_operand:DF 1 "nonimmediate_operand" "0")))]
+   "TARGET_80387"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:DF 0 "register_operand" "")
+ 	(abs:DF (match_operand:DF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
+   [(set (match_dup 0)
+ 	(abs:DF (match_dup 1)))]
+   "")
+ 
+ (define_split
+   [(set (match_operand:DF 0 "register_operand" "")
+ 	(abs:DF (match_operand:DF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
+   [(parallel [(set (match_dup 3) (and:SI (match_dup 3) (match_dup 4)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[4] = GEN_INT (~0x80000000);
+    split_di (operands+0, 1, operands+2, operands+3);")
+ 
+ (define_insn "absxf2"
+   [(set (match_operand:XF 0 "nonimmediate_operand" "=frm")
+ 	(abs:XF (match_operand:XF 1 "nonimmediate_operand" "0")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:XF 0 "register_operand" "")
+ 	(abs:XF (match_operand:XF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && FP_REGNO_P (REGNO (operands[0])) && reload_completed"
+   [(set (match_dup 0)
+ 	(abs:XF (match_dup 1)))]
+   "")
+ 
+ (define_split
+   [(set (match_operand:XF 0 "register_operand" "")
+ 	(abs:XF (match_operand:XF 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_80387 && reload_completed && !FP_REGNO_P (REGNO (operands[0]))"
+   [(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[1] = GEN_INT (~0x8000);
+    operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]) + 2);")
+ 
+ (define_insn "*abssf2_1"
    [(set (match_operand:SF 0 "register_operand" "=f")
  	(abs:SF (match_operand:SF 1 "register_operand" "0")))]
!   "TARGET_80387 && reload_completed"
    "fabs"
    [(set_attr "type" "fsgn")])
  
! (define_insn "*absdf2_1"
    [(set (match_operand:DF 0 "register_operand" "=f")
  	(abs:DF (match_operand:DF 1 "register_operand" "0")))]
!   "TARGET_80387 && reload_completed"
    "fabs"
    [(set_attr "type" "fsgn")])
  
***************
*** 4845,4854 ****
    "fabs"
    [(set_attr "type" "fsgn")])
  
! (define_insn "absxf2"
    [(set (match_operand:XF 0 "register_operand" "=f")
  	(abs:XF (match_operand:XF 1 "register_operand" "0")))]
!   "TARGET_80387"
    "fabs"
    [(set_attr "type" "fsgn")])
  
--- 5204,5213 ----
    "fabs"
    [(set_attr "type" "fsgn")])
  
! (define_insn "*absxf2_1"
    [(set (match_operand:XF 0 "register_operand" "=f")
  	(abs:XF (match_operand:XF 1 "register_operand" "0")))]
!   "TARGET_80387 && reload_completed"
    "fabs"
    [(set_attr "type" "fsgn")])
Follow-Ups:
- Re: i386 fabs/fchs patch
  - From: Richard Henderson
References:
- i386 fabs/fchs patch
  - From: Jan Hubicka
- Re: i386 fabs/fchs patch
  - From: Richard Henderson
- Re: i386 fabs/fchs patch
  - From: Jan Hubicka
- Re: i386 fabs/fchs patch
  - From: Richard Henderson
Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]