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i386 output reload fix
- To: gcc-patches at gcc dot gnu dot org
- Subject: i386 output reload fix
- From: Richard Henderson <rth at cygnus dot com>
- Date: Thu, 14 Oct 1999 03:35:27 -0700
Whee. I never would have suspected there were so many.
r~
* i386.h (SPECIAL_MODE_PREDICATES): New.
* i386.md (movstricthi_1): Use nonimmediate_operand for op 0.
(movqi_1, movdi_1, movdi_2, some splits): Likewise.
(addsi_lea_3): Add missing mode for op 3.
(prologue_set_got, prologue_get_pc): Add missing modes.
(*) Add missing output reload constraints.
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.h,v
retrieving revision 1.73
diff -c -p -d -r1.73 i386.h
*** i386.h 1999/10/10 07:44:13 1.73
--- i386.h 1999/10/14 10:32:43
*************** do { long l; \
*** 2397,2402 ****
--- 2397,2408 ----
{"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM, AND}}, \
{"long_memory_operand", {MEM}},
+
+ /* A list of predicates that do special things with modes, and so
+ should not elicit warnings for VOIDmode match_operand. */
+
+ #define SPECIAL_MODE_PREDICATES \
+ "ext_register_operand",
/* Variables in i386.c */
extern const char *ix86_cpu_string; /* for -mcpu=<xxx> */
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.91
diff -c -p -d -r1.91 i386.md
*** i386.md 1999/10/13 20:33:42 1.91
--- i386.md 1999/10/14 10:32:43
***************
*** 1365,1371 ****
}")
(define_insn "*movstricthi_1"
! [(set (strict_low_part (match_operand:HI 0 "general_operand" "+g,r"))
(match_operand:HI 1 "general_operand" "rn,m"))]
"! TARGET_PARTIAL_REG_STALL
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
--- 1365,1371 ----
}")
(define_insn "*movstricthi_1"
! [(set (strict_low_part (match_operand:HI 0 "nonimmediate_operand" "+m,r"))
(match_operand:HI 1 "general_operand" "rn,m"))]
"! TARGET_PARTIAL_REG_STALL
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
***************
*** 1408,1414 ****
(set_attr "length_prefix" "1")])
(define_insn "*movqi_1"
! [(set (match_operand:QI 0 "general_operand" "=q,q,*r,*r,m")
(match_operand:QI 1 "general_operand" "qn,qm,*rn,qm,qn"))
(clobber (reg:CC 17))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
--- 1408,1414 ----
(set_attr "length_prefix" "1")])
(define_insn "*movqi_1"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=q,q,*r,*r,m")
(match_operand:QI 1 "general_operand" "qn,qm,*rn,qm,qn"))
(clobber (reg:CC 17))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
***************
*** 1650,1663 ****
"#")
(define_insn "*movdi_1"
! [(set (match_operand:DI 0 "general_operand" "=r,o")
(match_operand:DI 1 "general_operand" "riFo,riF"))
(clobber (reg:CC 17))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
"#")
(define_insn "*movdi_2"
! [(set (match_operand:DI 0 "general_operand" "=r,o")
(match_operand:DI 1 "general_operand" "riFo,riF"))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
"#")
--- 1650,1663 ----
"#")
(define_insn "*movdi_1"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o")
(match_operand:DI 1 "general_operand" "riFo,riF"))
(clobber (reg:CC 17))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
"#")
(define_insn "*movdi_2"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o")
(match_operand:DI 1 "general_operand" "riFo,riF"))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
"#")
***************
*** 1679,1685 ****
;; %%% This multiword shite has got to go.
(define_split
! [(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "general_operand" ""))
(clobber (reg:CC 17))]
"reload_completed"
--- 1679,1685 ----
;; %%% This multiword shite has got to go.
(define_split
! [(set (match_operand:DI 0 "nonimmediate_operand" "")
(match_operand:DI 1 "general_operand" ""))
(clobber (reg:CC 17))]
"reload_completed"
***************
*** 1690,1696 ****
"if (ix86_split_movdi (operands)) DONE;")
(define_split
! [(set (match_operand:DI 0 "general_operand" "")
(match_operand:DI 1 "general_operand" ""))]
"reload_completed"
[(set (match_dup 2) (match_dup 4))
--- 1690,1696 ----
"if (ix86_split_movdi (operands)) DONE;")
(define_split
! [(set (match_operand:DI 0 "nonimmediate_operand" "")
(match_operand:DI 1 "general_operand" ""))]
"reload_completed"
[(set (match_dup 2) (match_dup 4))
***************
*** 2525,2531 ****
[(set (match_operand:SF 0 "nonimmediate_operand" "=m,f")
(float_truncate:SF
(match_operand:DF 1 "register_operand" "f,0")))
! (clobber (match_operand:SF 2 "memory_operand" "m,m"))]
"TARGET_80387"
"*
{
--- 2525,2531 ----
[(set (match_operand:SF 0 "nonimmediate_operand" "=m,f")
(float_truncate:SF
(match_operand:DF 1 "register_operand" "f,0")))
! (clobber (match_operand:SF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
***************
*** 2588,2594 ****
[(set (match_operand:SF 0 "nonimmediate_operand" "=m,f")
(float_truncate:SF
(match_operand:XF 1 "register_operand" "f,0")))
! (clobber (match_operand:SF 2 "memory_operand" "m,m"))]
"TARGET_80387"
"*
{
--- 2588,2594 ----
[(set (match_operand:SF 0 "nonimmediate_operand" "=m,f")
(float_truncate:SF
(match_operand:XF 1 "register_operand" "f,0")))
! (clobber (match_operand:SF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
***************
*** 2651,2657 ****
[(set (match_operand:DF 0 "nonimmediate_operand" "=m,f")
(float_truncate:DF
(match_operand:XF 1 "register_operand" "f,0")))
! (clobber (match_operand:DF 2 "memory_operand" "m,m"))]
"TARGET_80387"
"*
{
--- 2651,2657 ----
[(set (match_operand:DF 0 "nonimmediate_operand" "=m,f")
(float_truncate:DF
(match_operand:XF 1 "register_operand" "f,0")))
! (clobber (match_operand:DF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
***************
*** 2741,2750 ****
operands[3] = assign_386_stack_local (DImode, 1);")
(define_insn "*fix_truncdi_1"
! [(set (match_operand:DI 0 "nonimmediate_operand" "m,?r")
(fix:DI (match_operand 1 "register_operand" "f,f")))
! (clobber (match_operand:SI 2 "memory_operand" "o,o"))
! (clobber (match_operand:DI 3 "memory_operand" "m,m"))
(clobber (match_scratch:SI 4 "=&r,=&r"))
(clobber (match_scratch:XF 5 "=f,f"))]
"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))"
--- 2741,2750 ----
operands[3] = assign_386_stack_local (DImode, 1);")
(define_insn "*fix_truncdi_1"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r")
(fix:DI (match_operand 1 "register_operand" "f,f")))
! (clobber (match_operand:SI 2 "memory_operand" "=o,o"))
! (clobber (match_operand:DI 3 "memory_operand" "=m,m"))
(clobber (match_scratch:SI 4 "=&r,=&r"))
(clobber (match_scratch:XF 5 "=f,f"))]
"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))"
***************
*** 2800,2809 ****
operands[3] = assign_386_stack_local (SImode, 1);")
(define_insn "*fix_truncsi_1"
! [(set (match_operand:SI 0 "nonimmediate_operand" "m,?r")
(fix:SI (match_operand 1 "register_operand" "f,f")))
! (clobber (match_operand:SI 2 "memory_operand" "o,o"))
! (clobber (match_operand:SI 3 "memory_operand" "m,m"))
(clobber (match_scratch:SI 4 "=&r,r"))]
"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))"
"* return output_fix_trunc (insn, operands);"
--- 2800,2809 ----
operands[3] = assign_386_stack_local (SImode, 1);")
(define_insn "*fix_truncsi_1"
! [(set (match_operand:SI 0 "nonimmediate_operand" "=m,?r")
(fix:SI (match_operand 1 "register_operand" "f,f")))
! (clobber (match_operand:SI 2 "memory_operand" "=o,o"))
! (clobber (match_operand:SI 3 "memory_operand" "=m,m"))
(clobber (match_scratch:SI 4 "=&r,r"))]
"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))"
"* return output_fix_trunc (insn, operands);"
***************
*** 2825,2832 ****
;; %% Not used yet.
(define_insn "x86_fnstcw_1"
! [(set (match_operand:HI 0 "memory_operand" "m")
! (unspec [(reg:HI 18)] 11))]
"TARGET_80387"
"fnstcw\\t%0"
[(set_attr "length_opcode" "2")
--- 2825,2832 ----
;; %% Not used yet.
(define_insn "x86_fnstcw_1"
! [(set (match_operand:HI 0 "memory_operand" "=m")
! (unspec:HI [(reg:HI 18)] 11))]
"TARGET_80387"
"fnstcw\\t%0"
[(set_attr "length_opcode" "2")
***************
*** 2834,2840 ****
(define_insn "x86_fldcw_1"
[(set (reg:HI 18)
! (unspec [(match_operand:HI 0 "memory_operand" "m")] 12))]
"TARGET_80387"
"fldcw\\t%0"
[(set_attr "length_opcode" "2")
--- 2834,2840 ----
(define_insn "x86_fldcw_1"
[(set (reg:HI 18)
! (unspec:HI [(match_operand:HI 0 "memory_operand" "m")] 12))]
"TARGET_80387"
"fldcw\\t%0"
[(set_attr "length_opcode" "2")
***************
*** 3151,3157 ****
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "reg_no_sp_operand" "r")
(match_operand:SI 2 "const248_operand" "I"))
! (match_operand 3 "register_operand" "%r"))
(match_operand:SI 4 "immediate_operand" "i")))]
""
"*
--- 3151,3157 ----
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "reg_no_sp_operand" "r")
(match_operand:SI 2 "const248_operand" "I"))
! (match_operand:SI 3 "register_operand" "%r"))
(match_operand:SI 4 "immediate_operand" "i")))]
""
"*
***************
*** 3380,3386 ****
[(set_attr "type" "alu")])
(define_insn "*addqi_low_1"
! [(set (strict_low_part (match_operand:QI 0 "register_operand" "q"))
(plus:QI (match_operand:QI 1 "register_operand" "0")
(match_operand:QI 2 "general_operand" "qmn")))
(clobber (reg:CC 17))]
--- 3380,3386 ----
[(set_attr "type" "alu")])
(define_insn "*addqi_low_1"
! [(set (strict_low_part (match_operand:QI 0 "register_operand" "+q"))
(plus:QI (match_operand:QI 1 "register_operand" "0")
(match_operand:QI 2 "general_operand" "qmn")))
(clobber (reg:CC 17))]
***************
*** 6716,6722 ****
(define_insn "prologue_set_got"
[(set (match_operand:SI 0 "" "")
! (unspec_volatile
[(plus:SI (match_dup 0)
(plus:SI (match_operand:SI 1 "symbolic_operand" "")
(minus:SI (pc) (match_operand 2 "" ""))))] 1))
--- 6716,6722 ----
(define_insn "prologue_set_got"
[(set (match_operand:SI 0 "" "")
! (unspec_volatile:SI
[(plus:SI (match_dup 0)
(plus:SI (match_operand:SI 1 "symbolic_operand" "")
(minus:SI (pc) (match_operand 2 "" ""))))] 1))
***************
*** 6735,6741 ****
(define_insn "prologue_get_pc"
[(set (match_operand:SI 0 "" "")
! (unspec_volatile [(plus:SI (pc) (match_operand 1 "" ""))] 2))]
""
"*
{
--- 6735,6741 ----
(define_insn "prologue_get_pc"
[(set (match_operand:SI 0 "" "")
! (unspec_volatile:SI [(plus:SI (pc) (match_operand 1 "" ""))] 2))]
""
"*
{
***************
*** 7743,7749 ****
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "nonmemory_operand" "ri")))
! (set (match_operand:SI 3 "register_operand" "r")
(match_dup 3))
(clobber (reg:CC 17))]
""
--- 7743,7749 ----
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "nonmemory_operand" "ri")))
! (set (match_operand:SI 3 "register_operand" "=r")
(match_dup 3))
(clobber (reg:CC 17))]
""
***************
*** 7762,7769 ****
[(set_attr "type" "alu")])
(define_insn "epilogue_deallocate_stack"
! [(set (match_operand:SI 0 "register_operand" "r")
! (match_operand:SI 1 "register_operand" "r"))
(set (match_dup 1) (match_dup 1))]
""
"mov{l}\\t{%1, %0|%0, %1}"
--- 7762,7769 ----
[(set_attr "type" "alu")])
(define_insn "epilogue_deallocate_stack"
! [(set (match_operand:SI 0 "register_operand" "=r")
! (match_operand:SI 1 "register_operand" "+r"))
(set (match_dup 1) (match_dup 1))]
""
"mov{l}\\t{%1, %0|%0, %1}"