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Re: Need help with DImode hard regs in MD file
- To: Linas Vepstas <linas at linas dot org>
- Subject: Re: Need help with DImode hard regs in MD file
- From: Richard Henderson <rth at cygnus dot com>
- Date: Tue, 14 Sep 1999 13:46:22 -0700
- Cc: gcc-patches at gcc dot gnu dot org
- References: <199909140600.BAA24117@shadygrove.linas.org>
On Tue, Sep 14, 1999 at 01:00:41AM -0500, Linas Vepstas wrote:
> The 370 has an overflow-proof integer multiply: When multiplying
> two SImode integers, the result is DImode.
So it's really 32x32->64? Not 32x64->64?
The later is what's being implied by your existing code.
If 32x64->64 is true, you do not have a commutative operation,
and the solution is to remove % from the constraints.
If 32x32->64 is true, then you are golden and should be
able to use a pattern like
(define_insn "mulsidi3"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%0,0"))
(sign_extend:DI (match_operand:SI 2 "general_operand" "r,g"))))]
""
"@
MR %0,%2
M %0,%2")
(define_expand "mulsi3"
[(set (match_operand:SI 0 "register_operand" "")
(mult:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "general_operand" "")))]
""
"
{
rtx r = gen_reg_rtx (DImode);
emit_insn (gen_mulsidi3 (r, operands[1], operands[2]));
emit_move_insn (operands[0], gen_lowpart (SImode, r));
}")
Note that mulsidi3 is useful to the optimizers in other
ways too, so having it is a good thing.
r~