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QI to Si mode promoting patch for new_ia32_branch



Hi
This patch add similar scheme of promoting from QI to SI mode as we already
have for HI to SI. This helps to K6, where QImode operations are issued
to busy X pipe only. Also helps a bit on other CPUs w/o partial register
stalls IMO, because often SImode operations have shorter opcodes etc.

Thu Jul 22 22:51:01 EDT 1999  Jan Hubicka  <hubicka@freesoft.cz>
	* i386.md (movqi) New splitters to promote QI to SImode.
	(addqi) Likewise.
	(andqi) Likewise.
	(iorqi) Likewise.
	(xorqi) Likewise.
	(negqi) Likewise.
	(notqi) Likewise.
	(ashiftqi) Likewise.
	* i386.h (TARGET_PROMOT_QImode) New macro.
	(ix86_promote_QImode): Declare.
	* i386.c (ix86_promote_QImode): Declare.
*** /root/i386old2/i386.md	Tue Jul 20 02:34:08 1999
--- i386.md	Thu Jul 22 22:45:50 1999
***************
*** 1450,1455 ****
--- 1528,1543 ----
  	    ]
  	    (const_string "*")))])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(match_operand:QI 1 "aligned_nonimm_operand" ""))
+    (clobber (reg:CC 17))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (match_dup 1))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);")
+ 
  (define_insn "*movqi_2"
    [(set (match_operand:QI 0 "nonimmediate_operand" "=q,q,*r,*r,m")
  	(match_operand:QI 1 "general_operand" "qn,qm,*rn,qm,qn"))]
***************
*** 1487,1492 ****
--- 1575,1588 ----
  	    ]
  	    (const_string "*")))])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(match_operand:QI 1 "aligned_nonimm_operand" ""))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(set (match_dup 0) (match_dup 1))]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);")
+ 
  (define_expand "reload_outqi"
    [(parallel [(match_operand:QI 0 "" "=m")
                (match_operand:QI 1 "register_operand" "r")
***************
*** 3319,3324 ****
--- 3434,3452 ----
  	(const_string "incdec")
  	(const_string "alu")))])
  
+ ;; Some CPUs like promoting QImode to SImode.
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(plus:QI (match_operand:QI 1 "register_operand" "")
+ 		 (match_operand:QI 2 "aligned_nonimm_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);
+    operands[2] = gen_lowpart (SImode, operands[2]);")
+ 
  (define_insn "*addqi_2"
    [(set (reg:CCNO 17)
  	(compare:CCNO
***************
*** 4320,4325 ****
--- 4574,4591 ----
     and{l}\\t{%k2, %k0|%k0, %k2}"
    [(set_attr "type" "alu")])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(and:QI (match_operand:QI 1 "register_operand" "")
+ 		(match_operand:QI 2 "aligned_nonimm_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (and:SI (match_dup 1) (match_dup 2)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);
+    operands[2] = gen_lowpart (SImode, operands[2]);")
+ 
  (define_insn "*andqi_2"
    [(set (reg:CCNO 17)
  	(compare:CCNO (and:QI
***************
*** 4335,4340 ****
--- 4601,4623 ----
     and{l}\\t{%2, %k0|%k0, %2}"
    [(set_attr "type" "alu")])
  
+ (define_split
+   [(set (reg:CCNO 17)
+ 	(compare:CCNO (and:QI (match_operand:QI 1 "register_operand" "")
+ 			      (match_operand:QI 2 "aligned_nonimm_operand" ""))
+ 		      (const_int 0)))
+    (set (match_operand:QI 0 "register_operand" "")
+ 	(and:QI (match_dup 1) (match_dup 2)))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (reg:CCNO 17)
+ 		   (compare:CCNO (and:SI (match_dup 1) (match_dup 2))
+ 			         (const_int 0)))
+ 	      (set (match_dup 0)
+ 		   (and:SI (match_dup 1) (match_dup 2)))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);
+    operands[2] = gen_lowpart (SImode, operands[2]);")
+ 
  ;; ??? A bug in recog prevents it from recognizing a const_int as an
  ;; operand to zero_extend in andqi_ext_1.  It was checking explicitly
  ;; for a QImode operand, which of course failed.
***************
*** 4508,4513 ****
--- 4795,4812 ----
     or{l}\\t{%k2, %k0|%k0, %k2}"
    [(set_attr "type" "alu")])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(ior:QI (match_operand:QI 1 "register_operand" "")
+ 		(match_operand:QI 2 "aligned_nonimm_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 2)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);
+    operands[2] = gen_lowpart (SImode, operands[2]);")
+ 
  (define_insn "*iorqi_2"
    [(set (reg:CCNO 17)
  	(compare:CCNO (ior:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
***************
*** 4613,4618 ****
--- 4912,4929 ----
     xor{l}\\t{%k2, %k0|%k0, %k2}"
    [(set_attr "type" "alu")])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(xor:QI (match_operand:QI 1 "register_operand" "")
+ 		(match_operand:QI 2 "aligned_nonimm_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (xor:SI (match_dup 1) (match_dup 2)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);
+    operands[2] = gen_lowpart (SImode, operands[2]);")
+ 
  (define_insn "xorcqi_1"
    [(set (reg:CCNO 17)
  	(compare:CCNO
***************
*** 4742,4747 ****
--- 5064,5079 ----
    "neg{b}\\t%0"
    [(set_attr "type" "negnot")])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(neg:QI (match_operand:QI 1 "register_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (neg:SI (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);")
+ 
  (define_insn ""
    [(set (reg:CCNO 17)
  	(compare:CCNO (neg:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
***************
*** 4944,4949 ****
--- 5275,5290 ----
     not{l}\\t%k0"
    [(set_attr "type" "negnot")])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(not:QI (match_operand:QI 1 "register_operand" "")))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (not:SI (match_dup 1)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);")
+ 
+ 
  (define_insn ""
    [(set (reg:CCNO 17)
  	(compare:CCNO (not:QI (match_operand:QI 1 "nonimmediate_operand" "0"))
***************
*** 5304,5309 ****
--- 5708,5715 ----
  	   ]
  	   (const_string "ishift")))])
  
+ (define_split
+   [(set (match_operand:QI 0 "register_operand" "")
+ 	(ashift:QI (match_operand:QI 1 "register_operand" "")
+ 		   (match_operand:QI 2 "aligned_nonimm_operand" "")))
+    (clobber (reg:CC 17))]
+   "TARGET_PROMOTE_QImode && reload_completed"
+   [(parallel [(set (match_dup 0) (ashift:SI (match_dup 1) (match_dup 2)))
+ 	      (clobber (reg:CC 17))])]
+   "operands[0] = gen_lowpart (SImode, operands[0]);
+    operands[1] = gen_lowpart (SImode, operands[1]);")
+ 
  (define_insn ""
    [(set (reg:CCNO 17)
  	(compare:CCNO
*** /root/i386old2/i386.h	Tue Jul 20 02:32:34 1999
--- i386.h	Thu Jul 22 22:15:48 1999
*************** extern const int x86_use_leave, x86_push
*** 146,154 ****
  extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
  extern const int x86_unroll_strlen, x86_use_q_reg, x86_use_any_reg;
  extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;
  extern const int x86_use_loop, x86_use_fiop, x86_use_mov0;
  extern const int x86_use_cltd, x86_read_modify_write;
  extern const int x86_read_modify, x86_split_long_moves;
  
  #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
  #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
--- 146,154 ----
  extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
  extern const int x86_unroll_strlen, x86_use_q_reg, x86_use_any_reg;
  extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;
  extern const int x86_use_loop, x86_use_fiop, x86_use_mov0;
  extern const int x86_use_cltd, x86_read_modify_write;
  extern const int x86_read_modify, x86_split_long_moves;
+ extern const int x86_promote_QImode;
  
  #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
  #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
*************** extern const int x86_read_modify, x86_sp
*** 165,176 ****
  #define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & CPUMASK)
  #define TARGET_USE_LOOP (x86_use_loop & CPUMASK)
  #define TARGET_USE_FIOP (x86_use_fiop & CPUMASK)
  #define TARGET_USE_MOV0 (x86_use_mov0 & CPUMASK)
  #define TARGET_USE_CLTD (x86_use_cltd & CPUMASK)
  #define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & CPUMASK)
  #define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & CPUMASK)
  #define TARGET_READ_MODIFY (x86_read_modify & CPUMASK)
  
  #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
  
--- 165,175 ----
  #define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & CPUMASK)
  #define TARGET_USE_LOOP (x86_use_loop & CPUMASK)
  #define TARGET_USE_FIOP (x86_use_fiop & CPUMASK)
  #define TARGET_USE_MOV0 (x86_use_mov0 & CPUMASK)
  #define TARGET_USE_CLTD (x86_use_cltd & CPUMASK)
  #define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & CPUMASK)
  #define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & CPUMASK)
  #define TARGET_READ_MODIFY (x86_read_modify & CPUMASK)
+ #define TARGET_PROMOTE_QImode (x86_promote_QImode & CPUMASK)
  
  #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
  
*** /root/i386old2/i386.c	Tue Jul 20 02:32:03 1999
--- i386.c	Thu Jul 22 22:31:19 1999
*************** const int x86_cmove = m_PPRO;
*** 130,142 ****
  const int x86_deep_branch = m_PPRO | m_K6;
  const int x86_use_sahf = m_PPRO | m_K6;
  const int x86_partial_reg_stall = m_PPRO;
  const int x86_use_loop = m_K6;
  const int x86_use_fiop = ~m_PPRO;
  const int x86_use_mov0 = m_K6;
  const int x86_use_cltd = ~(m_PENT | m_K6);
  const int x86_read_modify_write = ~m_PENT;
  const int x86_read_modify = ~(m_PENT | m_PPRO);
  const int x86_split_long_moves = m_PPRO;
  
  #define AT_BP(mode) (gen_rtx_MEM ((mode), frame_pointer_rtx))
  
--- 130,143 ----
  const int x86_deep_branch = m_PPRO | m_K6;
  const int x86_use_sahf = m_PPRO | m_K6;
  const int x86_partial_reg_stall = m_PPRO;
! const int x86_use_loop = m_K6 /*m_386 | m_PPRO | m_K6 */;
  const int x86_use_fiop = ~m_PPRO;
  const int x86_use_mov0 = m_K6;
  const int x86_use_cltd = ~(m_PENT | m_K6);
  const int x86_read_modify_write = ~m_PENT;
  const int x86_read_modify = ~(m_PENT | m_PPRO);
  const int x86_split_long_moves = m_PPRO;
+ const int x86_promote_QImode = m_K6 | m_PENT;
  
  #define AT_BP(mode) (gen_rtx_MEM ((mode), frame_pointer_rtx))
  


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