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Patch to split x86 DImode constant shifts.


This patch adds a splitter for DImode constant shifts.

The effect of this patch can be seen by compiling:

  unsigned long
  func (unsigned long long a)
    {
    unsigned long long b;

    b = a;
    return b >> 5;
    }

with -O2 -S.

ChangeLog:

Mon Apr 12 20:42:18 EDT 1999  John Wehle  (john@feith.com)

	* i386.md (ashldi3, ashrdi3, lshrdi3): Rewrite using
	splitters for constant shifts.
	(ashlsi3, ashlhi3, ashrsi3, ashrhi3,
	lshrsi3, lshrhi3): The shift amount should be QImode.

Enjoy!

-- John Wehle
------------------8<------------------------8<------------------------
*** gcc/config/i386/i386.md.ORIGINAL	Mon Apr 12 15:49:41 1999
--- gcc/config/i386/i386.md	Mon Apr 12 20:35:01 1999
*************** byte_xor_operation:
*** 4879,4929 ****
  {
    if (GET_CODE (operands[2]) != CONST_INT
        || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
!     {
!       operands[2] = copy_to_mode_reg (QImode, operands[2]);
!       emit_insn (gen_ashldi3_non_const_int (operands[0], operands[1],
! 					    operands[2]));
!     }
!   else
!     emit_insn (gen_ashldi3_const_int (operands[0], operands[1], operands[2]));
! 
!   DONE;
! }")
! 
! (define_insn "ashldi3_const_int"
!   [(set (match_operand:DI 0 "register_operand" "=&r")
! 	(ashift:DI (match_operand:DI 1 "register_operand" "0")
! 		   (match_operand:QI 2 "const_int_operand" "J")))]
!   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')"
!   "*
! {
!   rtx xops[4], low[1], high[1];
! 
!   CC_STATUS_INIT;
! 
!   split_di (operands, 1, low, high);
!   xops[0] = operands[2];
!   xops[1] = const1_rtx;
!   xops[2] = low[0];
!   xops[3] = high[0];
! 
!   if (INTVAL (xops[0]) > 31)
!     {
!       output_asm_insn (AS2 (mov%L3,%2,%3), xops);	/* Fast shift by 32 */
!       output_asm_insn (AS2 (xor%L2,%2,%2), xops);
! 
!       if (INTVAL (xops[0]) > 32)
!         {
! 	  xops[0] = GEN_INT (INTVAL (xops[0]) - 32);
! 	  output_asm_insn (AS2 (sal%L3,%0,%3), xops); /* Remaining shift */
! 	}
!     }
!   else
!     {
!       output_asm_insn (AS3 (shld%L3,%0,%2,%3), xops);
!       output_asm_insn (AS2 (sal%L2,%0,%2), xops);
!     }
!   RET;
  }")
  
  (define_insn "ashldi3_non_const_int"
--- 4879,4885 ----
  {
    if (GET_CODE (operands[2]) != CONST_INT
        || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
!     operands[2] = copy_to_mode_reg (QImode, operands[2]);
  }")
  
  (define_insn "ashldi3_non_const_int"
*************** byte_xor_operation:
*** 4955,4964 ****
    RET;
  }")
  
  (define_expand "ashlsi3"
    [(set (match_operand:SI 0 "nonimmediate_operand" "")
  	(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "")
! 		   (match_operand:SI 2 "nonmemory_operand" "")))]
    ""
    "")
  
--- 4911,5019 ----
    RET;
  }")
  
+ (define_insn "ashldi3_32"
+   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o")
+ 	(ashift:DI (match_operand:DI 1 "nonimmediate_operand" "ro,r")
+ 		   (match_operand:QI 2 "const_int_operand" "J,J")))]
+   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')
+    && INTVAL (operands[2]) >= 32 && (GET_CODE (operands[0]) != MEM
+ 				     || GET_CODE (operands[1]) != MEM)"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ 	(ashift:DI (match_operand:DI 1 "nonimmediate_operand" "")
+ 		   (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && INTVAL (operands[2]) > 32"
+   [(set (match_dup 4)
+ 	(match_dup 5))
+    (set (match_dup 3)
+ 	(const_int 0))
+    (set (match_dup 4)
+ 	(ashift:SI (match_dup 4)
+ 		   (match_dup 6)))]
+   "
+ {
+   rtx xops[2];
+ 
+   split_di (&operands[0], 1, &operands[3], &operands[4]);
+   split_di (&operands[1], 1, &xops[0], &xops[1]);
+ 
+   operands[5] = xops[0];
+   operands[6] = GEN_INT (INTVAL (operands[2]) - 32);
+ }")
+ 
+ (define_split
+   [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ 	(ashift:DI (match_operand:DI 1 "nonimmediate_operand" "")
+ 		   (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && INTVAL (operands[2]) == 32"
+   [(set (match_dup 4)
+ 	(match_dup 5))
+    (set (match_dup 3)
+ 	(const_int 0))]
+   "
+ {
+   rtx xops[2];
+ 
+   split_di (&operands[0], 1, &operands[3], &operands[4]);
+   split_di (&operands[1], 1, &xops[0], &xops[1]);
+ 
+   operands[5] = xops[0];
+ }")
+ 
+ (define_insn ""
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(ashift:DI (match_operand:DI 1 "register_operand" "0")
+ 		   (match_operand:QI 2 "const_int_operand" "I")))]
+   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'I')"
+   "#");
+ 
+ (define_split
+   [(set (match_operand:DI 0 "register_operand" "")
+ 	(ashift:DI (match_operand:DI 1 "register_operand" "")
+ 		   (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'I')"
+   [(set (strict_low_part (subreg:SI (match_dup 0) 1))
+ 	(truncate:SI (lshiftrt:DI (ashift:DI (match_dup 1)
+ 					     (match_dup 2))
+ 				  (const_int 32))))
+    (set (match_dup 3)
+ 	(ashift:SI (match_dup 3)
+ 		   (match_dup 2)))]
+   "split_di (&operands[0], 1, &operands[3], &operands[4]);")
+ 
+ (define_insn ""
+   [(set (strict_low_part
+ 	  (subreg:SI (match_operand:DI 0 "register_operand" "=&r") 1))
+ 	(truncate:SI
+ 	  (lshiftrt:DI
+ 	    (ashift:DI (match_operand:DI 1 "register_operand" "0")
+ 		       (match_operand:QI 2 "nonmemory_operand" "cI"))
+ 	    (const_int 32))))]
+   ""
+   "*
+ {
+   rtx xops[3];
+ 
+   CC_STATUS_INIT;
+ 
+   xops[0] = operands[2];
+ 
+   split_di (&operands[0], 1, &xops[1], &xops[2]);
+ 
+   if (GET_CODE (operands[2]) == CONST_INT)
+     output_asm_insn (AS3 (shld%L3,%0,%1,%2), xops);
+   else
+     output_asm_insn (AS3_SHIFT_DOUBLE (shld%L3,%0,%1,%2), xops);
+ 
+   return \"\";
+ }")
+ 
  (define_expand "ashlsi3"
    [(set (match_operand:SI 0 "nonimmediate_operand" "")
  	(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "")
! 		   (match_operand:QI 2 "nonmemory_operand" "")))]
    ""
    "")
  
*************** byte_xor_operation:
*** 4971,4977 ****
  (define_insn ""
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r")
  	(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,r")
! 		   (match_operand:SI 2 "small_shift_operand" "M,M")))]
    "! optimize_size"
    "* return output_ashlsi3 (operands);")
  
--- 5026,5032 ----
  (define_insn ""
    [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r")
  	(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,r")
! 		   (match_operand:QI 2 "small_shift_operand" "M,M")))]
    "! optimize_size"
    "* return output_ashlsi3 (operands);")
  
*************** byte_xor_operation:
*** 4980,4993 ****
  (define_insn ""
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
! 		   (match_operand:SI 2 "nonmemory_operand" "cI")))]
    ""
    "* return output_ashlsi3 (operands);")
  
  (define_insn "ashlhi3"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
! 		   (match_operand:HI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
--- 5035,5048 ----
  (define_insn ""
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0")
! 		   (match_operand:QI 2 "nonmemory_operand" "cI")))]
    ""
    "* return output_ashlsi3 (operands);")
  
  (define_insn "ashlhi3"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
! 		   (match_operand:QI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
*************** byte_xor_operation:
*** 5027,5104 ****
  {
    if (GET_CODE (operands[2]) != CONST_INT
        || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
!     {
!       operands[2] = copy_to_mode_reg (QImode, operands[2]);
!       emit_insn (gen_ashrdi3_non_const_int (operands[0], operands[1],
! 					    operands[2]));
!     }
!   else
!     emit_insn (gen_ashrdi3_const_int (operands[0], operands[1], operands[2]));
! 
!   DONE;
! }")
! 
! (define_insn "ashldi3_32"
!   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,m")
! 	(ashift:DI (match_operand:DI 1 "nonimmediate_operand" "ro,r")
! 		   (const_int 32)))]
!   ""
!   "*
! {
!   rtx low[2], high[2], xops[4];
! 
!   split_di (operands, 2, low, high);
!   xops[0] = high[0];
!   xops[1] = low[1];
!   xops[2] = low[0];
!   xops[3] = const0_rtx;
!   if (!rtx_equal_p (xops[0], xops[1]))
!     output_asm_insn (AS2 (mov%L0,%1,%0), xops);
! 
!   if (GET_CODE (low[0]) == MEM)
!     output_asm_insn (AS2 (mov%L2,%3,%2), xops);
!   else
!     output_asm_insn (AS2 (xor%L2,%2,%2), xops);
! 
!   RET;
! }")
! 
! (define_insn "ashrdi3_const_int"
!   [(set (match_operand:DI 0 "register_operand" "=&r")
! 	(ashiftrt:DI (match_operand:DI 1 "register_operand" "0")
! 		     (match_operand:QI 2 "const_int_operand" "J")))]
!   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')"
!   "*
! {
!   rtx xops[4], low[1], high[1];
! 
!   CC_STATUS_INIT;
! 
!   split_di (operands, 1, low, high);
!   xops[0] = operands[2];
!   xops[1] = const1_rtx;
!   xops[2] = low[0];
!   xops[3] = high[0];
! 
!   if (INTVAL (xops[0]) > 31)
!     {
!       xops[1] = GEN_INT (31);
!       output_asm_insn (AS2 (mov%L2,%3,%2), xops);
!       output_asm_insn (AS2 (sar%L3,%1,%3), xops);	/* shift by 32 */
! 
!       if (INTVAL (xops[0]) > 32)
!         {
! 	  xops[0] = GEN_INT (INTVAL (xops[0]) - 32);
! 	  output_asm_insn (AS2 (sar%L2,%0,%2), xops); /* Remaining shift */
! 	}
!     }
!   else
!     {
!       output_asm_insn (AS3 (shrd%L2,%0,%3,%2), xops);
!       output_asm_insn (AS2 (sar%L3,%0,%3), xops);
!     }
! 
!   RET;
  }")
  
  (define_insn "ashrdi3_non_const_int"
--- 5082,5088 ----
  {
    if (GET_CODE (operands[2]) != CONST_INT
        || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
!     operands[2] = copy_to_mode_reg (QImode, operands[2]);
  }")
  
  (define_insn "ashrdi3_non_const_int"
*************** byte_xor_operation:
*** 5131,5136 ****
--- 5115,5197 ----
    RET;
  }")
  
+ (define_insn "ashrdi3_32"
+   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,&r,o")
+ 	(ashiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "0,ro,r")
+ 		     (match_operand:QI 2 "const_int_operand" "J,J,J")))]
+   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')
+    && INTVAL (operands[2]) >= 32 && (GET_CODE (operands[0]) != MEM
+ 				     || GET_CODE (operands[1]) != MEM)"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ 	(ashiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "")
+ 		     (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && INTVAL (operands[2]) > 32"
+   [(set (match_dup 3)
+ 	(match_dup 5))
+    (set (match_dup 4)
+ 	(match_dup 5))
+    (set (match_dup 4)
+ 	(ashiftrt:SI (match_dup 4)
+ 		     (const_int 31)))
+    (set (match_dup 3)
+ 	(ashiftrt:SI (match_dup 3)
+ 		     (match_dup 6)))]
+   "
+ {
+   rtx xops[2];
+ 
+   split_di (&operands[0], 1, &operands[3], &operands[4]);
+   split_di (&operands[1], 1, &xops[0], &xops[1]);
+ 
+   operands[5] = xops[1];
+   operands[6] = GEN_INT (INTVAL (operands[2]) - 32);
+ }")
+ 
+ (define_split
+   [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ 	(ashiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "")
+ 		     (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && INTVAL (operands[2]) == 32"
+   [(set (match_dup 3)
+ 	(match_dup 5))
+    (set (match_dup 4)
+ 	(match_dup 5))
+    (set (match_dup 4)
+ 	(ashiftrt:SI (match_dup 4)
+ 		     (const_int 31)))]
+   "
+ {
+   rtx xops[2];
+ 
+   split_di (&operands[0], 1, &operands[3], &operands[4]);
+   split_di (&operands[1], 1, &xops[0], &xops[1]);
+ 
+   operands[5] = xops[1];
+ }")
+ 
+ (define_insn ""
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(ashiftrt:DI (match_operand:DI 1 "register_operand" "0")
+ 		   (match_operand:QI 2 "const_int_operand" "I")))]
+   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'I')"
+   "#");
+ 
+ (define_split
+   [(set (match_operand:DI 0 "register_operand" "")
+ 	(ashiftrt:DI (match_operand:DI 1 "register_operand" "")
+ 		   (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'I')"
+   [(set (strict_low_part (subreg:SI (match_dup 0) 0))
+ 	(truncate:SI (lshiftrt:DI (match_dup 1)
+ 				  (match_dup 2))))
+    (set (match_dup 4)
+ 	(ashiftrt:SI (match_dup 4)
+ 		     (match_dup 2)))]
+   "split_di (&operands[0], 1, &operands[3], &operands[4]);")
+ 
  (define_insn "ashrsi3_31"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,d")
  	(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,a")
*************** byte_xor_operation:
*** 5143,5149 ****
  (define_insn "ashrsi3"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
! 		     (match_operand:SI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
--- 5204,5210 ----
  (define_insn "ashrsi3"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
! 		     (match_operand:QI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
*************** byte_xor_operation:
*** 5156,5162 ****
  (define_insn "ashrhi3"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
! 		     (match_operand:HI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
--- 5217,5223 ----
  (define_insn "ashrhi3"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
! 		     (match_operand:QI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
*************** byte_xor_operation:
*** 5192,5268 ****
  {
    if (GET_CODE (operands[2]) != CONST_INT
        || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
!     {
!       operands[2] = copy_to_mode_reg (QImode, operands[2]);
!       emit_insn (gen_lshrdi3_non_const_int (operands[0], operands[1],
! 					    operands[2]));
!     }
!   else
!     emit_insn (gen_lshrdi3_const_int (operands[0], operands[1], operands[2]));
! 
!   DONE;
! }")
! 
! (define_insn "lshrdi3_32"
!   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,m")
! 	(lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "ro,r")
! 		     (const_int 32)))]
!   ""
!   "*
! {
!   rtx low[2], high[2], xops[4];
! 
!   split_di (operands, 2, low, high);
!   xops[0] = low[0];
!   xops[1] = high[1];
!   xops[2] = high[0];
!   xops[3] = const0_rtx;
!   if (!rtx_equal_p (xops[0], xops[1]))
!     output_asm_insn (AS2 (mov%L0,%1,%0), xops);
! 
!   if (GET_CODE (low[0]) == MEM)
!     output_asm_insn (AS2 (mov%L2,%3,%2), xops);
!   else
!     output_asm_insn (AS2 (xor%L2,%2,%2), xops);
! 
!   RET;
! }")
! 
! (define_insn "lshrdi3_const_int"
!   [(set (match_operand:DI 0 "register_operand" "=&r")
! 	(lshiftrt:DI (match_operand:DI 1 "register_operand" "0")
! 		     (match_operand:QI 2 "const_int_operand" "J")))]
!   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')"
!   "*
! {
!   rtx xops[4], low[1], high[1];
! 
!   CC_STATUS_INIT;
! 
!   split_di (operands, 1, low, high);
!   xops[0] = operands[2];
!   xops[1] = const1_rtx;
!   xops[2] = low[0];
!   xops[3] = high[0];
! 
!   if (INTVAL (xops[0]) > 31)
!     {
!       output_asm_insn (AS2 (mov%L2,%3,%2), xops);	/* Fast shift by 32 */
!       output_asm_insn (AS2 (xor%L3,%3,%3), xops);
! 
!       if (INTVAL (xops[0]) > 32)
!         {
! 	  xops[0] = GEN_INT (INTVAL (xops[0]) - 32);
! 	  output_asm_insn (AS2 (shr%L2,%0,%2), xops); /* Remaining shift */
! 	}
!     }
!   else
!     {
!       output_asm_insn (AS3 (shrd%L2,%0,%3,%2), xops);
!       output_asm_insn (AS2 (shr%L3,%0,%3), xops);
!     }
! 
!   RET;
  }")
  
  (define_insn "lshrdi3_non_const_int"
--- 5253,5259 ----
  {
    if (GET_CODE (operands[2]) != CONST_INT
        || ! CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))
!     operands[2] = copy_to_mode_reg (QImode, operands[2]);
  }")
  
  (define_insn "lshrdi3_non_const_int"
*************** byte_xor_operation:
*** 5294,5303 ****
    RET;
  }")
  
  (define_insn "lshrsi3"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
! 		     (match_operand:SI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
--- 5285,5390 ----
    RET;
  }")
  
+ (define_insn "lshrdi3_32"
+   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o")
+ 	(lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "ro,r")
+ 		     (match_operand:QI 2 "const_int_operand" "J,J")))]
+   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J')
+    && INTVAL (operands[2]) >= 32 && (GET_CODE (operands[0]) != MEM
+ 				     || GET_CODE (operands[1]) != MEM)"
+   "#")
+ 
+ (define_split
+   [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ 	(lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "")
+ 		     (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && INTVAL (operands[2]) > 32"
+   [(set (match_dup 3)
+ 	(match_dup 5))
+    (set (match_dup 4)
+ 	(const_int 0))
+    (set (match_dup 3)
+ 	(lshiftrt:SI (match_dup 3)
+ 		     (match_dup 6)))]
+   "
+ {
+   rtx xops[2];
+ 
+   split_di (&operands[0], 1, &operands[3], &operands[4]);
+   split_di (&operands[1], 1, &xops[0], &xops[1]);
+ 
+   operands[5] = xops[1];
+   operands[6] = GEN_INT (INTVAL (operands[2]) - 32);
+ }")
+ 
+ (define_split
+   [(set (match_operand:DI 0 "nonimmediate_operand" "")
+ 	(lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "")
+ 		     (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && INTVAL (operands[2]) == 32"
+   [(set (match_dup 3)
+ 	(match_dup 5))
+    (set (match_dup 4)
+ 	(const_int 0))]
+   "
+ {
+   rtx xops[2];
+ 
+   split_di (&operands[0], 1, &operands[3], &operands[4]);
+   split_di (&operands[1], 1, &xops[0], &xops[1]);
+ 
+   operands[5] = xops[1];
+ }")
+ 
+ (define_insn ""
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(lshiftrt:DI (match_operand:DI 1 "register_operand" "0")
+ 		   (match_operand:QI 2 "const_int_operand" "I")))]
+   "CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'I')"
+   "#");
+ 
+ (define_split
+   [(set (match_operand:DI 0 "register_operand" "")
+ 	(lshiftrt:DI (match_operand:DI 1 "register_operand" "")
+ 		   (match_operand:QI 2 "const_int_operand" "")))]
+   "reload_completed && CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'I')"
+   [(set (strict_low_part (subreg:SI (match_dup 0) 0))
+ 	(truncate:SI (lshiftrt:DI (match_dup 1)
+ 				  (match_dup 2))))
+    (set (match_dup 4)
+ 	(lshiftrt:SI (match_dup 4)
+ 		     (match_dup 2)))]
+   "split_di (&operands[0], 1, &operands[3], &operands[4]);")
+ 
+ (define_insn ""
+   [(set (strict_low_part
+ 	  (subreg:SI (match_operand:DI 0 "register_operand" "=&r") 0))
+ 	(truncate:SI
+ 	  (lshiftrt:DI (match_operand:DI 1 "register_operand" "0")
+ 		       (match_operand:QI 2 "nonmemory_operand" "cI"))))]
+   ""
+   "*
+ {
+   rtx xops[3];
+ 
+   CC_STATUS_INIT;
+ 
+   xops[0] = operands[2];
+ 
+   split_di (&operands[0], 1, &xops[1], &xops[2]);
+ 
+   if (GET_CODE (operands[2]) == CONST_INT)
+     output_asm_insn (AS3 (shrd%L3,%0,%2,%1), xops);
+   else
+     output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L3,%0,%2,%1), xops);
+ 
+   return \"\";
+ }")
+ 
  (define_insn "lshrsi3"
    [(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
! 		     (match_operand:QI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
*************** byte_xor_operation:
*** 5310,5316 ****
  (define_insn "lshrhi3"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
! 		     (match_operand:HI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
--- 5397,5403 ----
  (define_insn "lshrhi3"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
  	(lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
! 		     (match_operand:QI 2 "nonmemory_operand" "cI")))]
    ""
    "*
  {
-------------------------------------------------------------------------
|   Feith Systems  |   Voice: 1-215-646-8000  |  Email: john@feith.com  |
|    John Wehle    |     Fax: 1-215-540-5495  |                         |
-------------------------------------------------------------------------



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