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Re: Small slowdown...



  In message <19990401150015.33120@atrey.karlin.mff.cuni.cz>you write:
  > > Yes (though I am not the best source for this answer).
  > OK, so here is the patch.
  > I've made two versions. First more unclean one modifying
Actually, I consider the first cleaner.


  > Another advantage of the first patch is that it adds support for AMD's
  > recommendation to use [ESI+0] addressing mode instead of [ESI].
This is a separate and independent change that could (and should) have been
submitted separately.

Never ever include a ChangeLog entry as a patch.  Include it as plaintext.  
ChangeLogs change so often that it is extremely rare that a patch to a
ChangeLog file will ever apply cleanly.

  >       case REG:
  > +       /* This is recommended by AMD manual. ESI addressing makes instruct
  > ion
  > +        * vector decoded. We can avoid this by ESI+0 addressing. */
Please follow the GNU coding standards.  You failed to do so in at least 3
ways in this comment.

  1. Two spaces after a period.

  2. The "*" at the start of the second line of the comment does not
     belong.

  3. "This is recommended by the AMD manual." does not realy mean anything.
     It seems clearer to delete that sentence and append "on the K6" at the
     end of the second sentence.


  > +       if (REGNO (addr) == 4 && ix86_cpu == PROCESSOR_K6 && !optimize_size
Try to avoid using register numbers like this, especially when the target has
either a macro for the register, or if the register is in a class by itself.
ie, 

  REGNO_REG_CLASS (REGNO (addr)) == SIREG



  > ! 	/* (reg,reg,) is shorter than (,reg,2). */
Always put two spaces after a period.

  > ! 	if(scale == 2)
Missing a space between the "if" and the open paren.  

I've fixed these problems and installed your patch.

However, I would strongly recommend you study the gnu coding standards so that
future submissions will be more correct and not be rejected because they do not
follow GNU coding standards.

Thanks,
jeff


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