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Patch to improve x86 integer -> FP conversions
- To: egcs-patches at egcs dot cygnus dot com
- Subject: Patch to improve x86 integer -> FP conversions
- From: John Wehle <john at feith dot com>
- Date: Wed, 31 Mar 1999 14:34:20 -0500 (EST)
This patch is a rewrite of the integer -> FP conversion patterns
using a splitter. Among other things this avoids using
output_op_from_reg which was outputing instructions behind the scenes
thus intefering with scheduling.
Notes:
1) I don't understand why floatdixf2 required that LONG_DOUBLE_TYPE_SIZE
equal 96. None of the other i386 integer -> FP patterns had any
special requirements (including floatdisf2).
ChangeLog:
Tue Mar 30 23:28:35 EST 1999 John Wehle (john@feith.com)
* i386.md (floatsisf2, floatdisf2, floatsidf2, floatdidf2,
floatsixf2, floatdixf2): Rewrite using a splitter.
Enjoy!
-- John Wehle
------------------8<------------------------8<------------------------
*** gcc/config/i386/i386.md.ORIGINAL Sun Mar 28 00:22:17 1999
--- gcc/config/i386/i386.md Wed Mar 31 12:24:34 1999
***************
*** 2722,2870 ****
"* return output_fix_trunc (insn, operands);")
;; Conversion between fixed point and floating point.
- ;; The actual pattern that matches these is at the end of this file.
;; ??? Possibly represent floatunssidf2 here in gcc2.
(define_expand "floatsisf2"
! [(set (match_operand:SF 0 "register_operand" "")
! (float:SF (match_operand:SI 1 "nonimmediate_operand" "")))]
! "TARGET_80387"
! "")
!
! (define_expand "floatdisf2"
! [(set (match_operand:SF 0 "register_operand" "")
! (float:SF (match_operand:DI 1 "nonimmediate_operand" "")))]
! "TARGET_80387"
"")
! (define_expand "floatsidf2"
! [(set (match_operand:DF 0 "register_operand" "")
! (float:DF (match_operand:SI 1 "nonimmediate_operand" "")))]
"TARGET_80387"
! "")
! (define_expand "floatdidf2"
! [(set (match_operand:DF 0 "register_operand" "")
! (float:DF (match_operand:DI 1 "nonimmediate_operand" "")))]
! "TARGET_80387"
"")
! (define_expand "floatsixf2"
! [(set (match_operand:XF 0 "register_operand" "")
! (float:XF (match_operand:SI 1 "nonimmediate_operand" "")))]
"TARGET_80387"
! "")
! (define_expand "floatdixf2"
! [(set (match_operand:XF 0 "register_operand" "")
! (float:XF (match_operand:DI 1 "nonimmediate_operand" "")))]
! "TARGET_80387 && LONG_DOUBLE_TYPE_SIZE == 96"
"")
- ;; This will convert from SImode or DImode to MODE_FLOAT.
-
(define_insn ""
! [(set (match_operand:XF 0 "register_operand" "=f")
! (float:XF (match_operand:DI 1 "nonimmediate_operand" "rm")))]
"TARGET_80387"
! "*
! {
! if (NON_STACK_REG_P (operands[1]))
! {
! output_op_from_reg (operands[1], AS1 (fild%z0,%1));
! RET;
! }
! else if (GET_CODE (operands[1]) == MEM)
! return AS1 (fild%z1,%1);
! else
! abort ();
! }")
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:DI 1 "nonimmediate_operand" "rm")))]
"TARGET_80387"
! "*
! {
! if (NON_STACK_REG_P (operands[1]))
! {
! output_op_from_reg (operands[1], AS1 (fild%z0,%1));
! RET;
! }
! else if (GET_CODE (operands[1]) == MEM)
! return AS1 (fild%z1,%1);
! else
! abort ();
! }")
! (define_insn ""
! [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:DI 1 "nonimmediate_operand" "rm")))]
! "TARGET_80387"
! "*
! {
! if (NON_STACK_REG_P (operands[1]))
! {
! output_op_from_reg (operands[1], AS1 (fild%z0,%1));
! RET;
! }
! else if (GET_CODE (operands[1]) == MEM)
! return AS1 (fild%z1,%1);
! else
! abort ();
! }")
(define_insn ""
! [(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:SI 1 "nonimmediate_operand" "rm")))]
"TARGET_80387"
! "*
! {
! if (NON_STACK_REG_P (operands[1]))
! {
! output_op_from_reg (operands[1], AS1 (fild%z0,%1));
! RET;
! }
! else if (GET_CODE (operands[1]) == MEM)
! return AS1 (fild%z1,%1);
! else
! abort ();
! }")
!
! (define_insn ""
! [(set (match_operand:XF 0 "register_operand" "=f,f")
! (float:XF (match_operand:SI 1 "nonimmediate_operand" "m,!*r")))]
! "TARGET_80387"
! "*
! {
! if (NON_STACK_REG_P (operands[1]))
! {
! output_op_from_reg (operands[1], AS1 (fild%z0,%1));
! RET;
! }
! else if (GET_CODE (operands[1]) == MEM)
! return AS1 (fild%z1,%1);
! else
! abort ();
! }")
(define_insn ""
! [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:SI 1 "nonimmediate_operand" "rm")))]
"TARGET_80387"
! "*
! {
! if (NON_STACK_REG_P (operands[1]))
! {
! output_op_from_reg (operands[1], AS1 (fild%z0,%1));
! RET;
! }
! else if (GET_CODE (operands[1]) == MEM)
! return AS1 (fild%z1,%1);
! else
! abort ();
! }")
;;- add instructions
--- 2722,2981 ----
"* return output_fix_trunc (insn, operands);")
;; Conversion between fixed point and floating point.
;; ??? Possibly represent floatunssidf2 here in gcc2.
(define_expand "floatsisf2"
! [(parallel [(set (match_operand:SF 0 "register_operand" "")
! (float:SF (match_operand:SI 1 "nonimmediate_operand" "")))
! (clobber (match_dup 2))])]
! "TARGET_80387"
! "operands[2] = assign_386_stack_local (SImode, 0);")
!
! (define_insn ""
! [(parallel
! [(set (match_operand:SF 0 "register_operand" "=f,f")
! (float:SF (match_operand:SI 1 "nonimmediate_operand" "m,!r")))
! (clobber (match_operand:SI 2 "memory_operand" "m,m"))])]
! "TARGET_80387"
! "#")
!
! (define_split
! [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:SI 1 "memory_operand" "m")))
! (clobber (match_operand:SI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 0)
! (float:SF (match_dup 1)))]
! "")
!
! (define_split
! [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:SI 1 "register_operand" "r")))
! (clobber (match_operand:SI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 2)
! (match_dup 1))
! (set (match_dup 0)
! (float:SF (match_dup 2)))]
"")
! (define_insn ""
! [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:SI 1 "memory_operand" "m")))]
"TARGET_80387"
! "* return AS1 (fild%z1,%1);"
! [(set_attr "type" "fpop")])
! (define_expand "floatdisf2"
! [(parallel [(set (match_operand:SF 0 "register_operand" "")
! (float:SF (match_operand:DI 1 "nonimmediate_operand" "")))
! (clobber (match_dup 2))])]
! "TARGET_80387"
! "operands[2] = assign_386_stack_local (DImode, 0);")
!
! (define_insn ""
! [(parallel
! [(set (match_operand:SF 0 "register_operand" "=f,f")
! (float:SF (match_operand:DI 1 "nonimmediate_operand" "m,!r")))
! (clobber (match_operand:DI 2 "memory_operand" "m,m"))])]
! "TARGET_80387"
! "#")
!
! (define_split
! [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:DI 1 "memory_operand" "m")))
! (clobber (match_operand:DI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 0)
! (float:SF (match_dup 1)))]
! "")
!
! (define_split
! [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:DI 1 "register_operand" "r")))
! (clobber (match_operand:DI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 2)
! (match_dup 1))
! (set (match_dup 0)
! (float:SF (match_dup 2)))]
"")
! (define_insn ""
! [(set (match_operand:SF 0 "register_operand" "=f")
! (float:SF (match_operand:DI 1 "memory_operand" "m")))]
"TARGET_80387"
! "* return AS1 (fild%z1,%1);"
! [(set_attr "type" "fpop")])
! (define_expand "floatsidf2"
! [(parallel [(set (match_operand:DF 0 "register_operand" "")
! (float:DF (match_operand:SI 1 "nonimmediate_operand" "")))
! (clobber (match_dup 2))])]
! "TARGET_80387"
! "operands[2] = assign_386_stack_local (SImode, 0);")
!
! (define_insn ""
! [(parallel
! [(set (match_operand:DF 0 "register_operand" "=f,f")
! (float:DF (match_operand:SI 1 "nonimmediate_operand" "m,!r")))
! (clobber (match_operand:SI 2 "memory_operand" "m,m"))])]
! "TARGET_80387"
! "#")
!
! (define_split
! [(parallel [(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:SI 1 "memory_operand" "m")))
! (clobber (match_operand:SI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 0)
! (float:DF (match_dup 1)))]
! "")
!
! (define_split
! [(parallel [(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:SI 1 "register_operand" "r")))
! (clobber (match_operand:SI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 2)
! (match_dup 1))
! (set (match_dup 0)
! (float:DF (match_dup 2)))]
"")
(define_insn ""
! [(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:SI 1 "memory_operand" "m")))]
"TARGET_80387"
! "* return AS1 (fild%z1,%1);"
! [(set_attr "type" "fpop")])
!
! (define_expand "floatdidf2"
! [(parallel [(set (match_operand:DF 0 "register_operand" "")
! (float:DF (match_operand:DI 1 "nonimmediate_operand" "")))
! (clobber (match_dup 2))])]
! "TARGET_80387"
! "operands[2] = assign_386_stack_local (DImode, 0);")
!
! (define_insn ""
! [(parallel
! [(set (match_operand:DF 0 "register_operand" "=f,f")
! (float:DF (match_operand:DI 1 "nonimmediate_operand" "m,!r")))
! (clobber (match_operand:DI 2 "memory_operand" "m,m"))])]
! "TARGET_80387"
! "#")
!
! (define_split
! [(parallel [(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:DI 1 "memory_operand" "m")))
! (clobber (match_operand:DI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 0)
! (float:DF (match_dup 1)))]
! "")
!
! (define_split
! [(parallel [(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:DI 1 "register_operand" "r")))
! (clobber (match_operand:DI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 2)
! (match_dup 1))
! (set (match_dup 0)
! (float:DF (match_dup 2)))]
! "")
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f")
! (float:DF (match_operand:DI 1 "memory_operand" "m")))]
"TARGET_80387"
! "* return AS1 (fild%z1,%1);"
! [(set_attr "type" "fpop")])
! (define_expand "floatsixf2"
! [(parallel [(set (match_operand:XF 0 "register_operand" "")
! (float:XF (match_operand:SI 1 "nonimmediate_operand" "")))
! (clobber (match_dup 2))])]
! "TARGET_80387"
! "operands[2] = assign_386_stack_local (SImode, 0);")
!
! (define_insn ""
! [(parallel
! [(set (match_operand:XF 0 "register_operand" "=f,f")
! (float:XF (match_operand:SI 1 "nonimmediate_operand" "m,!r")))
! (clobber (match_operand:SI 2 "memory_operand" "m,m"))])]
! "TARGET_80387"
! "#")
!
! (define_split
! [(parallel [(set (match_operand:XF 0 "register_operand" "=f")
! (float:XF (match_operand:SI 1 "memory_operand" "m")))
! (clobber (match_operand:SI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 0)
! (float:XF (match_dup 1)))]
! "")
!
! (define_split
! [(parallel [(set (match_operand:XF 0 "register_operand" "=f")
! (float:XF (match_operand:SI 1 "register_operand" "r")))
! (clobber (match_operand:SI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 2)
! (match_dup 1))
! (set (match_dup 0)
! (float:XF (match_dup 2)))]
! "")
(define_insn ""
! [(set (match_operand:XF 0 "register_operand" "=f")
! (float:XF (match_operand:SI 1 "memory_operand" "m")))]
"TARGET_80387"
! "* return AS1 (fild%z1,%1);"
! [(set_attr "type" "fpop")])
!
! (define_expand "floatdixf2"
! [(parallel [(set (match_operand:XF 0 "register_operand" "")
! (float:XF (match_operand:DI 1 "nonimmediate_operand" "")))
! (clobber (match_dup 2))])]
! "TARGET_80387"
! "operands[2] = assign_386_stack_local (DImode, 0);")
!
! (define_insn ""
! [(parallel
! [(set (match_operand:XF 0 "register_operand" "=f,f")
! (float:XF (match_operand:DI 1 "nonimmediate_operand" "m,!r")))
! (clobber (match_operand:DI 2 "memory_operand" "m,m"))])]
! "TARGET_80387"
! "#")
!
! (define_split
! [(parallel [(set (match_operand:XF 0 "register_operand" "=f")
! (float:XF (match_operand:DI 1 "memory_operand" "m")))
! (clobber (match_operand:DI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 0)
! (float:XF (match_dup 1)))]
! "")
!
! (define_split
! [(parallel [(set (match_operand:XF 0 "register_operand" "=f")
! (float:XF (match_operand:DI 1 "register_operand" "r")))
! (clobber (match_operand:DI 2 "memory_operand" "m"))])]
! "TARGET_80387 && reload_completed"
! [(set (match_dup 2)
! (match_dup 1))
! (set (match_dup 0)
! (float:XF (match_dup 2)))]
! "")
(define_insn ""
! [(set (match_operand:XF 0 "register_operand" "=f")
! (float:XF (match_operand:DI 1 "memory_operand" "m")))]
"TARGET_80387"
! "* return AS1 (fild%z1,%1);"
! [(set_attr "type" "fpop")])
;;- add instructions
-------------------------------------------------------------------------
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| John Wehle | Fax: 1-215-540-5495 | |
-------------------------------------------------------------------------