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adding a29k/i960 option doc strings


I have checked in this patch.

This gets rid of missing initializer warnings messages for toplev.c.
Plus I noticed an undocumented option while doing this, and fixed that too.

Thu Mar 25 12:46:37 1999  Jim Wilson  <wilson@cygnus.com>

	* a29k/a29k.h (TARGET_SWITCHES): Add doc strings.
	* i960/i960.h (TARGET_SWITCHES): Add doc strings.
	* invoke.texi (a29k): Add documentation for -mno-multm option.

Index: invoke.texi
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/invoke.texi,v
retrieving revision 1.100
diff -p -r1.100 invoke.texi
*** invoke.texi	1999/03/20 17:30:02	1.100
--- invoke.texi	1999/03/25 20:48:47
*************** Normally the facilities of the machine's
*** 3644,3649 ****
--- 3644,3654 ----
  this can't be done directly in cross-compilation.  You must make your
  own arrangements to provide suitable library functions for
  cross-compilation.
+ 
+ @item -mno-multm
+ @kindex -mno-multm
+ Do not generate multm or multmu instructions.  This is useful for some embedded
+ systems which do not have trap handlers for these instructions.
  @end table
  
  @node ARM Options
Index: config/a29k/a29k.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/a29k/a29k.h,v
retrieving revision 1.7
diff -p -r1.7 a29k.h
*** a29k.h	1998/12/16 21:00:36	1.7
--- a29k.h	1999/03/25 20:48:49
*************** extern int target_flags;
*** 97,122 ****
  #define TARGET_MULTM		((target_flags & 1024) == 0)
  
  #define TARGET_SWITCHES			\
!   { {"dw", 1},				\
!     {"ndw", -1},			\
!     {"bw", 2},				\
!     {"nbw", - (1|2)},			\
!     {"small", 4},			\
!     {"normal", - (4|8)},		\
!     {"large", 8},			\
!     {"29050", 16+128},			\
!     {"29000", -16},			\
!     {"kernel-registers", 32},		\
!     {"user-registers", -32},		\
!     {"stack-check", 64},		\
!     {"no-stack-check", - 74},		\
!     {"storem-bug", -128},		\
!     {"no-storem-bug", 128},		\
!     {"reuse-arg-regs", -256},		\
!     {"no-reuse-arg-regs", 256},		\
!     {"soft-float", 512},		\
!     {"no-multm", 1024},			\
!     {"", TARGET_DEFAULT}}
  
  #define TARGET_DEFAULT 3
  
--- 97,122 ----
  #define TARGET_MULTM		((target_flags & 1024) == 0)
  
  #define TARGET_SWITCHES			\
!   { {"dw", 1, "Generate code assuming DW bit is set"},			\
!     {"ndw", -1, "Generate code assuming DW bit is not set"},		\
!     {"bw", 2, "Generate code using byte writes"},			\
!     {"nbw", - (1|2), "Do not generate byte writes"},			\
!     {"small", 4, "Use small memory model"},				\
!     {"normal", - (4|8), "Use normal memory model"},			\
!     {"large", 8, "Use large memory model"},				\
!     {"29050", 16+128, "Generate 29050 code"},				\
!     {"29000", -16, "Generate 29000 code"},				\
!     {"kernel-registers", 32, "Use kernel global registers"},		\
!     {"user-registers", -32, "Use user global registers"},		\
!     {"stack-check", 64, "Emit stack checking code"},			\
!     {"no-stack-check", - 74, "Do not emit stack checking code"},	\
!     {"storem-bug", -128, "Work around storem hardware bug"},		\
!     {"no-storem-bug", 128, "Do not work around storem hardware bug"},	\
!     {"reuse-arg-regs", -256, "Store locals in argument registers"},	\
!     {"no-reuse-arg-regs", 256, "Do not store locals in arg registers"},	\
!     {"soft-float", 512, "Use software floating point"},			\
!     {"no-multm", 1024, "Do not generate multm instructions"},		\
!     {"", TARGET_DEFAULT, NULL}}
  
  #define TARGET_DEFAULT 3
  
Index: config/i960/i960.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/i960/i960.h,v
retrieving revision 1.23
diff -p -r1.23 i960.h
*** i960.h	1999/02/11 14:48:43	1.23
--- i960.h	1999/03/25 20:48:49
*************** extern int target_flags;
*** 229,286 ****
     am not sure which are real and which aren't.  */
  
  #define TARGET_SWITCHES  \
!   { {"sa", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR)},\
!     {"sb", (TARGET_FLAG_NUMERICS|TARGET_FLAG_K_SERIES| \
! 			TARGET_FLAG_COMPLEX_ADDR)},\
! /*  {"sc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|\
! 			TARGET_FLAG_MC|TARGET_FLAG_COMPLEX_ADDR)},*/ \
!     {"ka", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR)},\
!     {"kb", (TARGET_FLAG_NUMERICS|TARGET_FLAG_K_SERIES| \
! 			TARGET_FLAG_COMPLEX_ADDR)},\
! /*  {"kc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|\
! 			TARGET_FLAG_MC|TARGET_FLAG_COMPLEX_ADDR)},*/ \
!     {"ja", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR)},\
!     {"jd", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR)},\
!     {"jf", (TARGET_FLAG_NUMERICS|TARGET_FLAG_K_SERIES| \
! 			TARGET_FLAG_COMPLEX_ADDR)},\
!     {"rp", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR)},\
!     {"mc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|\
! 			TARGET_FLAG_MC|TARGET_FLAG_COMPLEX_ADDR)},\
!     {"ca", (TARGET_FLAG_C_SERIES|TARGET_FLAG_BRANCH_PREDICT|\
! 			TARGET_FLAG_CODE_ALIGN|TARGET_FLAG_COMPLEX_ADDR)},\
! /*  {"cb", (TARGET_FLAG_NUMERICS|TARGET_FLAG_C_SERIES|\
! 			TARGET_FLAG_BRANCH_PREDICT|TARGET_FLAG_CODE_ALIGN)},\
!     {"cc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|\
  			TARGET_FLAG_C_SERIES|TARGET_FLAG_BRANCH_PREDICT|\
! 			TARGET_FLAG_CODE_ALIGN)}, */	\
!     {"cf", (TARGET_FLAG_C_SERIES|TARGET_FLAG_BRANCH_PREDICT|\
! 			TARGET_FLAG_CODE_ALIGN|TARGET_FLAG_COMPLEX_ADDR)},\
!     {"numerics", (TARGET_FLAG_NUMERICS)},		\
!     {"soft-float", -(TARGET_FLAG_NUMERICS)},		\
!     {"leaf-procedures", TARGET_FLAG_LEAFPROC},		\
!     {"no-leaf-procedures",-(TARGET_FLAG_LEAFPROC)},	\
!     {"tail-call",TARGET_FLAG_TAILCALL},			\
!     {"no-tail-call",-(TARGET_FLAG_TAILCALL)},		\
!     {"complex-addr",TARGET_FLAG_COMPLEX_ADDR},		\
!     {"no-complex-addr",-(TARGET_FLAG_COMPLEX_ADDR)},	\
!     {"code-align",TARGET_FLAG_CODE_ALIGN},		\
!     {"no-code-align",-(TARGET_FLAG_CODE_ALIGN)},	\
!     {"clean-linkage", (TARGET_FLAG_CLEAN_LINKAGE)},	\
!     {"no-clean-linkage", -(TARGET_FLAG_CLEAN_LINKAGE)},	\
!     {"ic-compat", TARGET_FLAG_IC_COMPAT2_0},		\
!     {"ic2.0-compat", TARGET_FLAG_IC_COMPAT2_0},		\
!     {"ic3.0-compat", TARGET_FLAG_IC_COMPAT3_0},		\
!     {"asm-compat",TARGET_FLAG_ASM_COMPAT},		\
!     {"intel-asm",TARGET_FLAG_ASM_COMPAT},		\
!     {"strict-align", TARGET_FLAG_STRICT_ALIGN},		\
!     {"no-strict-align", -(TARGET_FLAG_STRICT_ALIGN)},	\
!     {"old-align", (TARGET_FLAG_OLD_ALIGN|TARGET_FLAG_STRICT_ALIGN)},	 \
!     {"no-old-align", -(TARGET_FLAG_OLD_ALIGN|TARGET_FLAG_STRICT_ALIGN)}, \
!     {"long-double-64", TARGET_FLAG_LONG_DOUBLE_64},	\
!     {"link-relax", 0},					\
!     {"no-link-relax", 0},				\
      SUBTARGET_SWITCHES                                                  \
!     { "", TARGET_DEFAULT}}
  
  /* This are meant to be redefined in the host dependent files */
  #define SUBTARGET_SWITCHES
--- 229,326 ----
     am not sure which are real and which aren't.  */
  
  #define TARGET_SWITCHES  \
!   { {"sa", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR),		\
!        "Generate SA code"},						\
!     {"sb", (TARGET_FLAG_NUMERICS|TARGET_FLAG_K_SERIES|			\
! 			TARGET_FLAG_COMPLEX_ADDR),			\
!        "Generate SB code"},						\
! /*  {"sc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|			\
! 			TARGET_FLAG_MC|TARGET_FLAG_COMPLEX_ADDR),	\
!        "Generate SC code"}, */						\
!     {"ka", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR),		\
!        "Generate KA code"},						\
!     {"kb", (TARGET_FLAG_NUMERICS|TARGET_FLAG_K_SERIES|			\
! 			TARGET_FLAG_COMPLEX_ADDR),			\
!        "Generate KB code"},						\
! /*  {"kc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|			\
! 			TARGET_FLAG_MC|TARGET_FLAG_COMPLEX_ADDR),	\
!        "Generate KC code"}, */						\
!     {"ja", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR),		\
!        "Generate JA code"},						\
!     {"jd", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR),		\
!        "Generate JD code"},						\
!     {"jf", (TARGET_FLAG_NUMERICS|TARGET_FLAG_K_SERIES|			\
! 			TARGET_FLAG_COMPLEX_ADDR),			\
!        "Generate JF code"},						\
!     {"rp", (TARGET_FLAG_K_SERIES|TARGET_FLAG_COMPLEX_ADDR),		\
!        "generate RP code"},						\
!     {"mc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|			\
! 			TARGET_FLAG_MC|TARGET_FLAG_COMPLEX_ADDR),	\
!        "Generate MC code"},						\
!     {"ca", (TARGET_FLAG_C_SERIES|TARGET_FLAG_BRANCH_PREDICT|		\
! 			TARGET_FLAG_CODE_ALIGN|TARGET_FLAG_COMPLEX_ADDR),\
!        "Generate CA code"},						\
! /*  {"cb", (TARGET_FLAG_NUMERICS|TARGET_FLAG_C_SERIES|			\
! 			TARGET_FLAG_BRANCH_PREDICT|TARGET_FLAG_CODE_ALIGN),\
!        "Generate CB code"},						\
!     {"cc", (TARGET_FLAG_NUMERICS|TARGET_FLAG_PROTECTED|			\
  			TARGET_FLAG_C_SERIES|TARGET_FLAG_BRANCH_PREDICT|\
! 			TARGET_FLAG_CODE_ALIGN),			\
!        "Generate CC code"}, */						\
!     {"cf", (TARGET_FLAG_C_SERIES|TARGET_FLAG_BRANCH_PREDICT|		\
! 			TARGET_FLAG_CODE_ALIGN|TARGET_FLAG_COMPLEX_ADDR),\
!        "Generate CF code"},						\
!     {"numerics", (TARGET_FLAG_NUMERICS),				\
!        "Use hardware floating point instructions"},			\
!     {"soft-float", -(TARGET_FLAG_NUMERICS),				\
!        "Use software floating point"},					\
!     {"leaf-procedures", TARGET_FLAG_LEAFPROC,				\
!        "Use alternate leaf function entries"},				\
!     {"no-leaf-procedures", -(TARGET_FLAG_LEAFPROC),			\
!        "Do not use alternate leaf function entries"},			\
!     {"tail-call", TARGET_FLAG_TAILCALL,					\
!        "Perform tail call optimization"},				\
!     {"no-tail-call", -(TARGET_FLAG_TAILCALL),				\
!        "Do not perform tail call optimization"},			\
!     {"complex-addr", TARGET_FLAG_COMPLEX_ADDR, 				\
!        "Use complex addressing modes"},					\
!     {"no-complex-addr", -(TARGET_FLAG_COMPLEX_ADDR),			\
!        "Do not use complex addressing modes"},				\
!     {"code-align", TARGET_FLAG_CODE_ALIGN,				\
!        "Align code to 8 byte boundary"},				\
!     {"no-code-align", -(TARGET_FLAG_CODE_ALIGN),			\
!        "Do not align code to 8 byte boundary"},				\
! /*  {"clean-linkage", (TARGET_FLAG_CLEAN_LINKAGE),			\
!        "Force use of prototypes"},					\
!     {"no-clean-linkage", -(TARGET_FLAG_CLEAN_LINKAGE),			\
!        "Do not force use of prototypes"}, */				\
!     {"ic-compat", TARGET_FLAG_IC_COMPAT2_0,				\
!        "Enable compatibility with iC960 v2.0"},				\
!     {"ic2.0-compat", TARGET_FLAG_IC_COMPAT2_0,				\
!        "Enable compatibility with iC960 v2.0"},				\
!     {"ic3.0-compat", TARGET_FLAG_IC_COMPAT3_0,				\
!        "Enable compatibility with iC960 v3.0"},				\
!     {"asm-compat", TARGET_FLAG_ASM_COMPAT,				\
!        "Enable compatibility with ic960 assembler"},			\
!     {"intel-asm", TARGET_FLAG_ASM_COMPAT,				\
!        "Enable compatibility with ic960 assembler"},			\
!     {"strict-align", TARGET_FLAG_STRICT_ALIGN,				\
!        "Do not permit unaligned accesses"},				\
!     {"no-strict-align", -(TARGET_FLAG_STRICT_ALIGN),			\
!        "Permit unaligned accesses"},					\
!     {"old-align", (TARGET_FLAG_OLD_ALIGN|TARGET_FLAG_STRICT_ALIGN),	\
!        "Layout types like Intel's v1.3 gcc"},				\
!     {"no-old-align", -(TARGET_FLAG_OLD_ALIGN|TARGET_FLAG_STRICT_ALIGN),	\
!        "Do not layout types like Intel's v1.3 gcc"},			\
!     {"long-double-64", TARGET_FLAG_LONG_DOUBLE_64,			\
!        "Use 64 bit long doubles"},					\
!     {"link-relax", 0,							\
!        "Enable linker relaxation"},					\
!     {"no-link-relax", 0,						\
!        "Do not enable linker relaxation"},				\
      SUBTARGET_SWITCHES                                                  \
!     { "", TARGET_DEFAULT,						\
! 	NULL}}
  
  /* This are meant to be redefined in the host dependent files */
  #define SUBTARGET_SWITCHES


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