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Re: patch for volatile/immediate comparison
- To: christian dot bruel at st dot com
- Subject: Re: patch for volatile/immediate comparison
- From: Toshiyasu Morita <tm at netcom dot com>
- Date: Mon, 22 Mar 1999 11:39:37 -0800 (PST)
- Cc: egcs-patches at cygnus dot com
> I'm not familiar with the Intel cost of the intructions, but there are some
> architectures where loading a register and doing the comparison is more
> expensive that directly doing the comparison with the memory (if the value is
> not reused after) (at least to all non-risk machines allowing memory
I have located the Intel Architecture Optimization manual and uploaded
for easy perusal.
Most of the items I mentioned before are covered in the section 184.108.40.206
"Restrictions on Pair Execution". They use the "add reg, mem" example
instead of the increment mem example, but it's functionally the same problem.