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config/m68k/lb1sf68.asm (udivsi3): Change jmi to jcs. Fix comments.


I have installed this patch.

This fixes some coldfire bugs found by PlumHall testing.
udivsi3/umodsi3 failed if the divisor had the most significant bit set.
An invalid addressing mode using an HImode index reg could be generated in
some cases.

Mon Mar  1 15:03:51 1999  Jim Wilson  <wilson@cygnus.com>

	* config/m68k/lb1sf68.asm (udivsi3): Change jmi to jcs.  Fix comments.
	* config/m68k/m68k.h (LEGITIMATE_INDEX_REG_P): Reject SIGN_EXTEND of
	HImode reg when TARGET_5200.

Index: lb1sf68.asm
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/m68k/lb1sf68.asm,v
retrieving revision 1.4
diff -p -r1.4 lb1sf68.asm
*** lb1sf68.asm	1998/12/16 21:06:45	1.4
--- lb1sf68.asm	1999/03/01 23:03:35
*************** L1:	addl	d0,d0		| shift reg pair (p,a) o
*** 382,390 ****
  	addxl	d2,d2
  	movl	d2,d3		| subtract b from p, store in tmp.
  	subl	d1,d3
! 	jmi	L2		| if the result is not is negative, set the
! 	bset	IMM (0),d0	| low order bit of a to 1 and store tmp in p.
! 	movl	d3,d2
  L2:	subql	IMM (1),d4
  	jcc	L1
  	moveml	sp@,d2-d4	| restore data registers
--- 382,390 ----
  	addxl	d2,d2
  	movl	d2,d3		| subtract b from p, store in tmp.
  	subl	d1,d3
! 	jcs	L2		| if no carry,
! 	bset	IMM (0),d0	| set the low order bit of a to 1,
! 	movl	d3,d2		| and store tmp in p.
  L2:	subql	IMM (1),d4
  	jcc	L1
  	moveml	sp@,d2-d4	| restore data registers
Index: m68k.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/m68k/m68k.h,v
retrieving revision 1.31
diff -p -r1.31 m68k.h
*** m68k.h	1999/02/19 01:20:28	1.31
--- m68k.h	1999/03/01 23:03:35
*************** __transfer_from_trampoline ()					\
*** 1463,1471 ****
  	  && (TARGET_68020 || (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100))		\
  	{ rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
  
  #define LEGITIMATE_INDEX_REG_P(X)   \
    ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))	\
!    || (GET_CODE (X) == SIGN_EXTEND			\
         && GET_CODE (XEXP (X, 0)) == REG			\
         && GET_MODE (XEXP (X, 0)) == HImode		\
         && REG_OK_FOR_INDEX_P (XEXP (X, 0)))		\
--- 1463,1473 ----
  	  && (TARGET_68020 || (unsigned) INTVAL (XEXP (X, 0)) + 0x80 < 0x100))		\
  	{ rtx go_temp = XEXP (X, 1); GO_IF_INDEXING (go_temp, ADDR); } } }
  
+ /* coldfire/5200 does not allow HImode index registers.  */
  #define LEGITIMATE_INDEX_REG_P(X)   \
    ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))	\
!    || (! TARGET_5200					\
!        && GET_CODE (X) == SIGN_EXTEND			\
         && GET_CODE (XEXP (X, 0)) == REG			\
         && GET_MODE (XEXP (X, 0)) == HImode		\
         && REG_OK_FOR_INDEX_P (XEXP (X, 0)))		\


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