This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: SMALL_REGISTER_CLASSES fixes for combine.c
- To: crux at pool dot informatik dot rwth-aachen dot de (Bernd Schmidt)
- Subject: Re: SMALL_REGISTER_CLASSES fixes for combine.c
- From: Toshiyasu Morita <tm at netcom dot com>
- Date: Wed, 2 Dec 1998 16:22:51 -0800 (PST)
- Cc: egcs-patches at cygnus dot com
> Are we really losing significant optimizations by inhibiting the combination
> of hardreg<->pseudo moves? As far as I can see that could save one register
> copy at best, and only if register allocation fails to choose the right hard
> reg for the involved pseudo.
One register copy can be quite a bit.
On a processor such as the Pentium or MIPS R5000 where it's dual-issue
without register result forwarding you basically introduce a two-clock
latency for the value to be used, which is pragmatically three or four
machine instructions.
In a tight loop this is very bad, because the latency can't be hidden
very well.
Also, if I understand this correctly (?) it sounds as though it can eat
up an extra register, which is extremely bad on register-starved
architectures such as the x86, Thumb, MIPS16, and Hitachi SH.
Toshi