m32r/m32r.c (gen_split_move_double): Call alter_subreg. Delete...

[Jim Wilson <wilson at cygnus dot com>]

I have installed this patch to fix a m32r build problem.  It wasn't
properly handling (SUBREG (MEM)), which is now more common because of
a side-effect of Joern's reload patch.

1998-10-22  Jim Wilson  <wilson@cygnus.com>

	* m32r/m32r.c (gen_split_move_double): Call alter_subreg.  Delete
	subreg support.

Index: m32r.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/m32r/m32r.c,v
retrieving revision 1.6
diff -p -r1.6 m32r.c
*** m32r.c	1998/09/18 10:27:46	1.6
--- m32r.c	1998/10/23 20:51:18
*************** gen_split_move_double (operands)
*** 1123,1138 ****
    rtx src  = operands[1];
    rtx val;
  
    start_sequence ();
!   if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
      {
        /* reg = reg */
!       if (GET_CODE (src) == REG || GET_CODE (src) == SUBREG)
  	{
  	  /* We normally copy the low-numbered register first.  However, if
  	     the first register operand 0 is the same as the second register of
  	     operand 1, we must copy in the opposite order.  */
- 	  int reverse = (REGNO (operands[0]) == REGNO (operands[1]) + 1);
  	  emit_insn (gen_rtx_SET (VOIDmode,
  				  operand_subword (dest, reverse, TRUE, mode),
  				  operand_subword (src,  reverse, TRUE, mode)));
--- 1123,1151 ----
    rtx src  = operands[1];
    rtx val;
  
+   /* We might have (SUBREG (MEM)) here, so just get rid of the
+      subregs to make this code simpler.  It is safe to call
+      alter_subreg any time after reload.  */
+   if (GET_CODE (dest) == SUBREG)
+     dest = alter_subreg (dest);
+   if (GET_CODE (src) == SUBREG)
+     src = alter_subreg (src);
+ 
    start_sequence ();
!   if (GET_CODE (dest) == REG)
      {
+       int dregno = REGNO (dest);
+ 
        /* reg = reg */
!       if (GET_CODE (src) == REG)
  	{
+ 	  int sregno = REGNO (src);
+ 
+ 	  int reverse = (dregno == sregno + 1);
+ 
  	  /* We normally copy the low-numbered register first.  However, if
  	     the first register operand 0 is the same as the second register of
  	     operand 1, we must copy in the opposite order.  */
  	  emit_insn (gen_rtx_SET (VOIDmode,
  				  operand_subword (dest, reverse, TRUE, mode),
  				  operand_subword (src,  reverse, TRUE, mode)));
*************** gen_split_move_double (operands)
*** 1162,1169 ****
  	  /* If the high-address word is used in the address, we must load it
  	     last.  Otherwise, load it first.  */
  	  rtx addr = XEXP (src, 0);
! 	  int reverse = (refers_to_regno_p (REGNO (dest), REGNO (dest)+1,
! 					    addr, 0) != 0);
  
  	  /* We used to optimize loads from single registers as
  
--- 1175,1181 ----
  	  /* If the high-address word is used in the address, we must load it
  	     last.  Otherwise, load it first.  */
  	  rtx addr = XEXP (src, 0);
! 	  int reverse = (refers_to_regno_p (dregno, dregno+1, addr, 0) != 0);
  
  	  /* We used to optimize loads from single registers as
  
*************** gen_split_move_double (operands)
*** 1205,1212 ****
  	st r1,r3; st r2,+r3; addi r3,-4
  
       which saves 2 bytes and doesn't force longword alignment.  */
!   else if (GET_CODE (dest) == MEM
! 	   && (GET_CODE (src) == REG || GET_CODE (src) == SUBREG))
      {
        rtx addr = XEXP (dest, 0);
  
--- 1217,1223 ----
  	st r1,r3; st r2,+r3; addi r3,-4
  
       which saves 2 bytes and doesn't force longword alignment.  */
!   else if (GET_CODE (dest) == MEM && GET_CODE (src) == REG)
      {
        rtx addr = XEXP (dest, 0);