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Re: Memory model release/acquire mode interactions of relaxed atomic operations
On 4 May 2017 at 10:24, Toebs Douglass wrote:
> Atomic in this context, I believe, actually only really means the
> absence of word-tearing; you won't write half your int and then get
> swapped out and then write the other half later.
No, "atomic" in the C++ memory model has a specific meaning, more than
just guaranteeing no word-tearing. Even on a CPU architecture where
word-tearing is impossible, the use of atomic operations rather than
non-atomic ones gives information to the compiler that affects the
semantics.