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Re: mlock in cache

From: Florian Weimer <fweimer at redhat dot com>
To: Christos <xristos dot tsop at gmail dot com>
Cc: gcc-help at gcc dot gnu dot org, Andrew Haley <aph at redhat dot com>
Date: Fri, 02 Aug 2013 17:40:57 +0200
Subject: Re: mlock in cache
References: <51FBBE65 dot 2000406 at gmail dot com> <51FBC1DE dot 3000501 at redhat dot com> <51FBCA48 dot 20106 at gmail dot com> <51FBCE48 dot 6080402 at redhat dot com> <51FBD281 dot 2040803 at gmail dot com>

On 08/02/2013 05:38 PM, Christos wrote:

On 08/02/2013 04:20 PM, Florian Weimer wrote:

Most CPUs just do not support this.

Some hardware transaction memory implementations perform cache line
locking as an implementation detail.


Do you know any of them as an example?


Intel Haswell, perhaps.

--
Florian Weimer / Red Hat Product Security Team

References:
- mlock in cache
  - From: Christos
- Re: mlock in cache
  - From: Andrew Haley
- Re: mlock in cache
  - From: Christos
- Re: mlock in cache
  - From: Florian Weimer
- Re: mlock in cache
  - From: Christos

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