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Re: Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
- From: Maxim Kuvyrkov <maxim at codesourcery dot com>
- To: Jan K <jprofesorek at o2 dot pl>
- Cc: <gcc-help at gcc dot gnu dot org>
- Date: Tue, 4 Dec 2012 15:54:26 +1300
- Subject: Re: Bare metal ARM Cross compiler - aeabi auto-generated functions for cortex-m0 use wrong instruction set
- References: <500b56a9.5ca9268d.50bb722e.3c885@o2.pl>
On 3/12/2012, at 4:22 AM, Jan K wrote:
> Hi!
> I'm trying to get the cross-toolchain for cortex-m0 working. The target is arm-none-eabi.
> The gcc has no problem compiling my code using allowed instructions only. As long as I do not try to use / or % my code runs as expected.
> When I try to divide, GCC uses and appends ARM runtime ABI functions (which is correct, since m0 has no hardware division op).
> The problem is that included functions (in particular: __aeabi_idiv) use instructions that are _not_ part of the cortex-m0 instructions set (like lsleq, movne, rsbmi).
> I compile and link the code with '-mcpu=cortex-m0 -mthumb' flags.
> What I want to is to force gcc to include the ARM runtime ABI functions that work with cortex-m0.
> How can I get it working? Am I missing something? Is it anyhow possible?
How libgcc (and other GCC libraries) are compiled is defined by multilib flags. It appears that the default multilib for the compiler that you built is not "-mcpu=cortex-m0" (probably, it's something ARMv4-ish).
For a quick fix try adding --with-arch=cortex-m0 to GCC configure line.
--
Maxim Kuvyrkov
CodeSourcery / Mentor Graphics