This is the mail archive of the gcc-help@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Back end question.


"Dmitry" <mittie@ukr.net> writes:

> Ok but if people do not set each status bit individually, how do they set several not related bits in one CC mode and in one set rtx?

They represent the collection of bits as a mode, as you've been
discussing.

E.g., from config/i386/i386.md

(define_insn "*<plusminus_insn><mode>3_cc_overflow"
  [(set (reg:CCC FLAGS_REG)
	(compare:CCC
	    (plusminus:SWI
		(match_operand:SWI 1 "nonimmediate_operand" "<comm>0,0")
		(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
	    (match_dup 1)))
   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
	(plusminus:SWI (match_dup 1) (match_dup 2)))]
  "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
  "<plusminus_mnemonic>{<imodesuffix>}\t{%2, %0|%0, %2}"
  [(set_attr "type" "alu")
   (set_attr "mode" "<MODE>")])


Here the CCC mode (defined in i386-modes.def) means that the carry flag
is valid.

Ian


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]