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Re: Workaround of CPU device errata?
- From: k-tsubota at ap dot jp dot nec dot com
- To: Nicholas Sherlock <n dot sherlock at gmail dot com>
- Cc: gcc-help at gcc dot gnu dot org
- Date: Fri, 16 Oct 2009 19:01:49 +0900
- Subject: Re: Workaround of CPU device errata?
- References: <hb7cis$2kr$1@ger.gmane.org>
Thanks Nicholas
As to errata W34, W56 (*1),
I wonder if Bug#:35194 (*3) might have relation with the errata,
because FPU of Intel core2 duo also has similar errata(*2).
Or, the workarounds already might be implemented in current GCC ...
Thanks,
K.Tsubota
---
(*1)
Celeron M processor Specification Update
-> http://download.intel.com/design/mobile/SPECUPDT/300303.pdf
-> Errata W11,W17,W34,W56
(*2)
Core2duo processor Specification Update
-> http://download.intel.com/design/processor/specupdt/313279.pdf
-> Errata AI20,AI38
(*3)
the bugzilla - Bug#:35194
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35194
---
>k-tsubota@ap.jp.nec.com wrote:
>> Does anyone know how to confirm if these workarounds
>> are already implemented in current GCC?
>>
>> -> http://download.intel.com/design/mobile/SPECUPDT/300303.pdf
>> -> Errata W11
>
>As far as I can see, this is only of interest to debug-tool writers, not
>application developers.
>
>> W17
>
>Only applies in ring 0, where these registers are writable. The
>workaround is for a debugger to ignore phantom breakpoints being
>triggered, not for the application to change.
>
>> W34, W56
>
>I don't know about these two. The first one sounds exceedingly unlikely
>to be triggered.
>
>Cheers,
>Nicholas Sherlock