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why EABI ARM gcc occupys r12
- From: "Bridge Wu" <mingqiao dot wu at gmail dot com>
- To: gcc-help at gcc dot gnu dot org, linux-arm-toolchain at lists dot arm dot linux dot org dot uk
- Date: Sun, 8 Oct 2006 14:29:46 +0800
- Subject: why EABI ARM gcc occupys r12
Hello,
I met a problem when changing my GCC from v3.4.3 to v4.1.0. Some
assembly code which is fine with gcc-3.4.3 cannot work properly any
more with gcc-4.1.0. After some investigation, it is because the
assembly code uses r12 which is conflict with linker.
Below are some excerption from ARM EABI spec (aapcs v2.04),
"Both the ARM- and Thumb-state BL instructions are unable to address
the full 32-bit address space, so it may be necessary for the linker
to insert a veneer between the calling routine and the called
subroutine. Veneers may also be needed to support ARM-Thumb
inter-working or dynamic linking. Any veneer inserted must preserve
the contents of all registers except IP (r12) and the condition code
flags; a conforming program must assume that a veneer that alters IP
may be inserted at any branch instruction that is exposed to a
relocation that supports inter-working or long branches. "
I wonder why gcc-4.1.0 has to occupy r12 while gcc-3.4.3 not?
--
best regards,
-Bridge