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Re: Reason for extra NOPs instructions ???

From: Nathan Sidwell <nathan at codesourcery dot com>
To: Manoj K Sharma <msharma at intoto dot com>
Cc: gcc-help at gcc dot gnu dot org
Date: Mon, 14 Mar 2005 13:52:49 +0000
Subject: Re: Reason for extra NOPs instructions ???
Organization: Codesourcery LLC
References: <1110807814.1162.33.camel@rh.intotoind.com>

Manoj K Sharma wrote:

Hi All,
I have recently shifted from x86 based targets to Pentium based. This
obviously resulted in shift from gcc for I80486 to gcc pentium cross
compiler.

I see some increase in my .text segment size(compare to gcc for I80486).
On investigating it, I found that it is mainly because lot of NOPs being
insterted in between. This results in bigger .text segment than what I
see in case of gcc for I80486.

Could some one please explain whats the idea behind inserting these many
NOPs ???

cache aligning jump targets -- especially in loops.

nathan
--
Nathan Sidwell    ::   http://www.codesourcery.com   ::     CodeSourcery LLC
nathan@codesourcery.com    ::     http://www.planetfall.pwp.blueyonder.co.uk

References:
- Reason for extra NOPs instructions ???
  - From: Manoj K Sharma

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