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Reason for extra NOPs instructions ???
- From: Manoj K Sharma <msharma at intoto dot com>
- To: gcc-help at gcc dot gnu dot org
- Date: 14 Mar 2005 19:13:24 +0530
- Subject: Reason for extra NOPs instructions ???
Hi All,
I have recently shifted from x86 based targets to Pentium based. This
obviously resulted in shift from gcc for I80486 to gcc pentium cross
compiler.
I see some increase in my .text segment size(compare to gcc for I80486).
On investigating it, I found that it is mainly because lot of NOPs being
insterted in between. This results in bigger .text segment than what I
see in case of gcc for I80486.
Here is one such example.
ac: 70 00 jo ae <FTPAlgGlblVarInit+0xae>
ae: 90 nop
af: 90 nop
b0: 90 nop
b1: 90 nop
b2: 90 nop
b3: 90 nop
b4: 90 nop
b5: 90 nop
b6: 90 nop
b7: 90 nop
b8: 90 nop
b9: 90 nop
ba: 90 nop
bb: 90 nop
bc: 90 nop
bd: 90 nop
be: 90 nop
bf: 90 nop
c0: 0d 0a 20 46 54 or $0x5446200a,%eax
Could some one please explain whats the idea behind inserting these many
NOPs ???
Thanks,
Manoj