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r249836 - in /branches/gcc-6-branch/gcc: Change...
- From: meissner at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: Fri, 30 Jun 2017 12:09:12 -0000
- Subject: r249836 - in /branches/gcc-6-branch/gcc: Change...
Author: meissner
Date: Fri Jun 30 12:09:12 2017
New Revision: 249836
URL: https://gcc.gnu.org/viewcvs?rev=249836&root=gcc&view=rev
Log:
[gcc]
2017-06-30 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from mainline
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in
32-bit, since indexed is not valid for DImode.
(mov<mode>_hardfloat32): Reorder ISA 2.07 load/stores before ISA
3.0 d-form load/stores to be the same as mov<mode>_hardfloat64.
(define_peephole2 for Altivec d-form load): Add 32-bit support.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-06-30 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from mainline
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Allow test to run on 32-bit.
* gcc.target/powerpc/pr80510-2.c: Likewise.
Modified:
branches/gcc-6-branch/gcc/ChangeLog
branches/gcc-6-branch/gcc/config/rs6000/rs6000.md
branches/gcc-6-branch/gcc/testsuite/ChangeLog
branches/gcc-6-branch/gcc/testsuite/gcc.target/powerpc/pr80510-1.c
branches/gcc-6-branch/gcc/testsuite/gcc.target/powerpc/pr80510-2.c