r242303 - in /branches/ARM/sve-branch/gcc: conf...

[rsandifo at gcc dot gnu dot org]

Author: rsandifo
Date: Fri Nov 11 17:37:05 2016
New Revision: 242303

URL: https://gcc.gnu.org/viewcvs?rev=242303&root=gcc&view=rev
Log:
[AArch64] Add SVE support

This patch adds support for ARM's Scalable Vector Extension.
The patch just contains the core features that work with the
current vectoriser framework; later patches will add extra
capabilities to both the target-independent code and AArch64 code.

The copyright years for aarch64-sve.md start at 2009 because some of
the code is based on aarch64.md, which also starts from then.

The patch inserts spaces between items in the AArch64 section
of sourcebuild.texi.  This matches at least the surrounding
architectures and looks a little nicer in the info output.

Added:
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-sve.md
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_arith_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_cvtf_signed_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_cvtf_signed_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_cvtf_unsigned_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_cvtf_unsigned_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_dup_imm_1.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_dup_imm_1_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fabs_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fcvtz_signed_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fcvtz_signed_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fcvtz_unsigned_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fcvtz_unsigned_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fdiv_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fdup_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fdup_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fmad_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fmla_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fmls_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fmsb_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fmul_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fneg_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fnmad_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fnmla_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fnmls_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fp_arith_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_frinta_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_frinti_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_frintm_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_frintp_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_frintx_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_frintz_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fsqrt_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_fsubr_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_index_1.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_index_1_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_infloop_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_ld1r_2.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_load_const_offset_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_load_scalar_offset_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_logical_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_loop_add_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_loop_add_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_maxmin_1.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_maxmin_1_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_maxmin_strict_1.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_maxmin_strict_1_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_mla_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_mls_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_mov_rr_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_mul_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_neg_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_nlogical_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_nlogical_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_fcvt_signed_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_fcvt_signed_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_fcvt_unsigned_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_fcvt_unsigned_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_float_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_pack_float_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_popcount_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_popcount_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_reduc_1.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_reduc_1_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_reduc_2.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_reduc_2_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_reduc_4.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_shift_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_single_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_single_2.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_single_3.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_single_4.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_store_scalar_offset_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_subr_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_fcvt_signed_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_fcvt_signed_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_fcvt_unsigned_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_fcvt_unsigned_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_float_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_float_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_signed_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_signed_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_unsigned_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_unpack_unsigned_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_uzp1_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_uzp1_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_uzp2_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_uzp2_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vcond_1.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vcond_1_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vcond_2.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vcond_2_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vcond_3.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vcond_4.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vcond_4_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_init_1.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_init_1_run.C
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_init_2.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_1_overrange_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_const_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_const_1_overrun.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_const_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_const_single_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_const_single_1_run.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_single_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/sve_vec_perm_single_1_run.c
Modified:
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-c.c
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-modes.def
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-option-extensions.def
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-opts.h
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64-protos.h
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.c
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.h
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.md
    branches/ARM/sve-branch/gcc/config/aarch64/aarch64.opt
    branches/ARM/sve-branch/gcc/config/aarch64/constraints.md
    branches/ARM/sve-branch/gcc/config/aarch64/iterators.md
    branches/ARM/sve-branch/gcc/config/aarch64/predicates.md
    branches/ARM/sve-branch/gcc/doc/invoke.texi
    branches/ARM/sve-branch/gcc/doc/md.texi
    branches/ARM/sve-branch/gcc/doc/sourcebuild.texi
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/fmaxmin.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/fmul_fcvt_2.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/pr62178.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/saddw-1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/saddw-2.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/uaddw-1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/uaddw-2.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/uaddw-3.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-add-sub-cond.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-compile.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-faddv-compile.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin-compile.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv-compile.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fmovd.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fmovf.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-movi.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect-reduc-or_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect_saddl_1.c
    branches/ARM/sve-branch/gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c
    branches/ARM/sve-branch/gcc/testsuite/lib/target-supports.exp