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r242282 - /branches/ARM/sve-branch/gcc/lra-spil...
- From: rsandifo at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: Fri, 11 Nov 2016 17:33:17 -0000
- Subject: r242282 - /branches/ARM/sve-branch/gcc/lra-spil...
Date: Fri Nov 11 17:33:17 2016
New Revision: 242282
Improve spilling for variable-width slots
Once SVE is enabled, a general AArch64 spill slot offset will be
A + B * VL
where A is a constant and B is a multiple of the SVE vector length.
The offsets in SVE load and store instructions are a multiple of VL
(and so can encode some Bs), while offsets for standard AArch64 load
and store instructions aren't (and encode some As). We therefore
get better spill code if variable-sized slots are grouped together
separately from constant-sized slots, and if variable-sized slots
are not reused for constant-sized data. Then, spills to the
constant-sized slots can add B * VL to the offset first, creating
a common anchor point for spills with the same B component but
different A components. Similarly, spills to variable-sized slots
can add A to the offset first, creating a common anchor point spills
with the same A component but different B components.
This patch implements the sorting and grouping side of the optimisation.
A later patch creates the anchor points.