This is the mail archive of the
gcc-cvs@gcc.gnu.org
mailing list for the GCC project.
r240370 - in /branches/ARM/embedded-5-branch/gc...
- From: thopre01 at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: Thu, 22 Sep 2016 15:21:32 -0000
- Subject: r240370 - in /branches/ARM/embedded-5-branch/gc...
Author: thopre01
Date: Thu Sep 22 15:21:32 2016
New Revision: 240370
URL: https://gcc.gnu.org/viewcvs?rev=240370&root=gcc&view=rev
Log:
2016-09-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/sync.md (atomic_compare_and_swap<mode>_1): Add new ARMv8-M
Baseline only alternatives to (i) hold store atomic success value in a
return register rather than a scratch register, (ii) use a low register
for it and to (iii) ensure the cbranchsi insn generated by the split
respect the constraints of Thumb-1 cbranchsi4_insn and
cbranchsi4_scratch.
* config/arm/thumb1.md (cbranchsi4_insn): Add comment to indicate
constraints must match those in atomic_compare_and_swap.
(cbranchsi4_scratch): Likewise.
Modified:
branches/ARM/embedded-5-branch/gcc/ChangeLog.arm
branches/ARM/embedded-5-branch/gcc/config/arm/sync.md
branches/ARM/embedded-5-branch/gcc/config/arm/thumb1.md