This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug rtl-optimization/83620] [8 Regression] ICE: in assign_by_spills, at lra-assigns.c:1470: unable to find a register to spill with -flive-range-shrinkage --param=max-sched-ready-insns=0


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83620

--- Comment #6 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #4)
> Or, alternatively, does --param=max-sched-ready-insns=0 make sense and is it
> supportable?  If not, we could just require it to be at least one.

This parameter is only to constraint quadratic behaviour of the scheduler (and
register live shrinkage based on it).  If we ignore compilation time, there
should be no maximum constraint.

I believe we should have non-zero minimal value for the parameter, otherwise
scheduling (and live range shrinkage) has a little sense.  IMHO, 10 would be a
reasonable as the minimal value (to take insns with different fixed regs like
ax,dx,cx).

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]