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[Bug middle-end/83699] [8 regression] Many 64-bit SPARC gcc.dg/vect tests FAIL
- From: "rsandifo at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Fri, 05 Jan 2018 16:55:47 +0000
- Subject: [Bug middle-end/83699] [8 regression] Many 64-bit SPARC gcc.dg/vect tests FAIL
- Auto-submitted: auto-generated
- References: <bug-83699-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83699
--- Comment #2 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
Created attachment 43047
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43047&action=edit
Hacky patch
In no-scevccp-outer-10.c, LRA enters a cycle trying to move
(subreg:SI (reg:V2SI R) 0) into a GPR. It emits:
(set (reg:SI tmp) (subreg:SI (reg:V2SI R) 0))
(set (reg:SI dest) (reg:SI tmp))
and sets the class of "tmp" to ALL_REGS. We then assign a GPR
to it, creating the same problem again.
The subreg is valid for SPARC because of REGMODE_NATURAL_SIZE.
I think the problem is that TMP needs to be restricted to
EXTRA_FP_REGS.
The attached patch does that in a hacky way. I think a more
correct way of achieving the same thing would be to make LRA
take simplifiable_subregs into account when picking the
register for a subreg reload, just as IRA does.
I'm not sure whether this is the problem for all the
mentioned tests or not.