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[Bug rtl-optimization/83565] RTL combine pass breaks shift result (at least on ia64)
- From: "wilson at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Sun, 24 Dec 2017 18:37:56 +0000
- Subject: [Bug rtl-optimization/83565] RTL combine pass breaks shift result (at least on ia64)
- Auto-submitted: auto-generated
- References: <bug-83565-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83565
--- Comment #18 from Jim Wilson <wilson at gcc dot gnu.org> ---
SPARC defines WORD_REGISTER_OPERATIONS, and works the same as ia64. The upper
bits of a 64-bit register after a 32-bit operation are don't care bits.