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[Bug rtl-optimization/83565] RTL combine pass breaks shift result (at least on ia64)


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83565

--- Comment #2 from Sergei Trofimovich <slyfox at inbox dot ru> ---
Where the change happens (today's gcc master):
    $./bin/ia64-unknown-linux-gnu-gcc -O1 -S a.c -fdump-rtl-all

    $ fgrep -A3 zero_extract a.c.*

zero_extract extracted 31 bits at offset 1:

a.c.262r.init-regs:        (zero_extract:DI (reg:DI 358)
a.c.262r.init-regs-            (const_int 31 [0x1f])
a.c.262r.init-regs-            (const_int 1 [0x1]))) "a.c":28 159 {extzv}
a.c.262r.init-regs-     (expr_list:REG_DEAD (reg:DI 358)

a.c.264r.combine:insn_cost 4 for    23: r359:DI=zero_extract(r358:DI,0x1f,0x1)
a.c.264r.combine-      REG_DEAD r358:DI
a.c.264r.combine-insn_cost 4 for    24: r356:SI#0=r359:DI
a.c.264r.combine-      REG_DEAD r359:DI

a.c.264r.combine:modifying insn i3    29: r8:DI=zero_extract(r358:DI,0x20,0x1)
a.c.264r.combine-      REG_DEAD r358:DI
a.c.264r.combine-deferring rescan insn with uid = 29.
a.c.264r.combine-starting the processing of deferred insns

zero_extract extracts 32 bits at offset 1:

a.c.264r.combine:        (zero_extract:DI (reg:DI 358)
a.c.264r.combine-            (const_int 32 [0x20])
a.c.264r.combine-            (const_int 1 [0x1]))) "a.c":33 159 {extzv}
a.c.264r.combine-     (expr_list:REG_DEAD (reg:DI 358)

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