This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/82440] [8 regression] ICE in aarch64_simd_valid_immediate
- From: "sje at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 05 Oct 2017 15:26:37 +0000
- Subject: [Bug target/82440] [8 regression] ICE in aarch64_simd_valid_immediate
- Auto-submitted: auto-generated
- References: <bug-82440-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82440
Steve Ellcey <sje at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |sje at gcc dot gnu.org,
| |sudi.das at arm dot com
--- Comment #1 from Steve Ellcey <sje at gcc dot gnu.org> ---
Presumably due to this patch:
2017-10-04 Sudakshina Das <sudi.das@arm.com>
* config/aarch64/aarch64-protos.h (enum simd_immediate_check): New
check type for aarch64_simd_valid_immediate.
(aarch64_output_simd_mov_immediate): Update prototype.
(aarch64_simd_valid_immediate): Update prototype.
* config/aarch64/aarch64-simd.md (orr<mode>3): modified pattern to add
support for ORR-immediate.
(and<mode>3): modified pattern to add support for BIC-immediate.
* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Function
now checks for valid immediate for BIC and ORR based on new enum
argument.
(aarch64_output_simd_mov_immediate): Function now used to output
BIC/ORR imm as well based on new enum argument.
* config/aarch64/constraints.md (Do): New vector immediate constraint.
(Db) : Likewise.
* config/aarch64/predicates.md (aarch64_reg_or_orr_imm): New predicate.
(aarch64_reg_or_bic_imm): Likewise.