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[Bug target/67638] [SH] ICE with nosave_low_regs ISR and -mfmovd
- From: "olegendo at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 10 Aug 2017 14:30:33 +0000
- Subject: [Bug target/67638] [SH] ICE with nosave_low_regs ISR and -mfmovd
- Auto-submitted: auto-generated
- References: <bug-67638-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67638
--- Comment #2 from Oleg Endo <olegendo at gcc dot gnu.org> ---
(In reply to Martin Liška from comment #1)
> Can't reproduce with cross compiler on trunk and gcc-5 branch. Is it
> reproducible with cross compiler? Which options do you use?
You have to use -m4 or -m4a (SH4 or SH4A with double precision FPU). -mfmovd is
only effective on those CPUs.
I just checked on some old dev version ( 7.0.0 20160503 (experimental) (GCC) ),
and it is reproducible.