[Bug tree-optimization/80876] New: [8 Regression] ICE in verify_loop_structure, at cfgloop.c:1644 (error: loop 1's latch does not have an edge to its header)

["asolokha at gmx dot com" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80876

            Bug ID: 80876
           Summary: [8 Regression] ICE in verify_loop_structure, at
                    cfgloop.c:1644 (error: loop 1's latch does not have an
                    edge to its header)
           Product: gcc
           Version: 8.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: asolokha at gmx dot com
  Target Milestone: ---

gcc-8.0.0-alpha20170521 snapshot ICEs when compiling the following snippet w/
-O2:

int sy;

void
fo (char o5)
{
  char yh = 0;

  if (o5 == 0)
    return;

  while (o5 != 0)
    if (0)
      {
        while (yh != 0)
          {
            o5 = 0;
            while (o5 < 2)
              {
                sy &= yh;
                if (sy != 0)
                  {
 km:
                    sy = yh;
                  }
              }
            ++yh;
          }
      }
    else
      {
        o5 = sy;
        goto km;
      }
}

void
on (void)
{
  fo (sy);
}

% x86_64-pc-linux-gnu-gcc-8.0.0-alpha20170521 -O2 -c a0nuylan.c                 
a0nuylan.c: In function 'fo.part.0':
a0nuylan.c:34:1: error: loop 1's latch does not have an edge to its header
 }
 ^
a0nuylan.c:34:1: internal compiler error: in verify_loop_structure, at
cfgloop.c:1644