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[Bug target/69460] ARM Cortex M0 produces suboptimal code vs Cortex M3


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69460

strntydog at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Version|5.2.0                       |6.3.1

--- Comment #4 from strntydog at gmail dot com ---
Ok, so i just tested to see if this problem with Cortex M0/M0+ code generation
persists in GCC 6.3.1, which is the latest GCC Binary distributed by the Arm
Embedded folks.  And it does.

To put the Optimisation failure into perspective, this is the difference
between the 6 tests in the test case:

Test 1 - Code Size is 40% Bigger for M0, and the Function is 114% bigger.
Test 2 - Code Size is 20% bigger for M0, and the Function is 44% bigger.
Test 3 - Code Size is same between M0 and M3, but the Function is 43% bigger.
Test 4 - Code Size is 40% Bigger for M0, and the Function is 86% bigger.
Test 5 - Code Size is same between M0 and M3, but the Function is 14% bigger.
Test 6 - Code Size is 38% Bigger for M0, and the Function is 100% bigger.

These are HUGE.  

This means that on average these function will run about 22% slower than they
should and consume 67% more FLASH space than they should. But worst case from
my tests could be over twice as large as they need to be and need 40% more
instructions to achieve the same thing.

This problem is easily shown to occur when accessing memory location at known
addresses, something which microcontroller programs do all the time. This
problem effects every single M0 Application written which is compiled with GCC,
wasting Flash and running slower.

Note: Code Size refers to the number of instructions in the function, and the
function size is the code size plus its Literal data.  Code size is a measure
of performance on the M0, because more instructions means more cycles to
execute. And Function size is a measure of flash wastage.

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