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[Bug middle-end/80283] [5/6/7 Regression] bad SIMD register allocation
- From: "wilco at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Tue, 11 Apr 2017 10:51:12 +0000
- Subject: [Bug middle-end/80283] [5/6/7 Regression] bad SIMD register allocation
- Auto-submitted: auto-generated
- References: <bug-80283-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283
--- Comment #13 from wilco at gcc dot gnu.org ---
It looks the x64 issue is unrelated. It starts with a bad schedule which could
be improved by the scheduler but that is off by default, while the ARM version
starts with a good schedule which is completely messed up by the scheduler.