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[Bug middle-end/79514] [5/6/7 Regression] ICE in curr_insn_transform, at lra-constraints.c:3773
- From: "jakub at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 02 Mar 2017 09:13:23 +0000
- Subject: [Bug middle-end/79514] [5/6/7 Regression] ICE in curr_insn_transform, at lra-constraints.c:3773
- Auto-submitted: auto-generated
- References: <bug-79514-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79514
--- Comment #9 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 40868
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40868&action=edit
gcc7-pr79514.patch
You mean like this? That certainly works for x86, but I'm afraid it is going
to break or penalize various other arches.
The thing is, HAVE_PRE_MODIFY_DISP is set to 1 only on 5 targets, but quick
grep reveals that there are many more targets that somehow handle pre_modify or
have insn patterns using that. This is not unlike HAVE_PRE_DEC and similar,
x86 also doesn't claim it has HAVE_PRE_DEC, yet it uses it for pushes.
So I think pushxf1 expander in i386.md is the way to go.