[Bug target/79202] New: On Power8, consider using vupkhsw/xxpermdi to sign extend an int in a vector register instead of mfvsrwz/mtvsrwa

["meissner at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79202

            Bug ID: 79202
           Summary: On Power8, consider using vupkhsw/xxpermdi to sign
                    extend an int in a vector register instead of
                    mfvsrwz/mtvsrwa
           Product: gcc
           Version: 7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: meissner at gcc dot gnu.org
  Target Milestone: ---

I was looking at the code generated for:

double x, y;
    /* ... */
x = (double)(int)y;

On Power9, we use the vextsw2d instruction, but that isn't available on Power8
(or Power7).

For example, the test ppc-round2.c has:

double
round_double_int (double a)
{
  return (double)(int)a;
}

This generates the following on power8:

        xscvdpsxws 32,1
        mfvsrd 9,32
        mtvsrwa 1,9
        fcfid 1,1

It may be more optimal to generate something like:

        xscvdpsxws 32,1
        vupkhsw 1,0
        xxpermdi 2,33,33,3
        fcfid 3,2

And on power9 it generates:

        xscvdpsxws 32,1
        vextsw2d 0,0
        xscvsxddp 1,32

since it knows it can do a SIGN_EXTEND:DI in the Altivec register file.