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[Bug rtl-optimization/78547] [7 Regression] ICE: in loc_cmp, at var-tracking.c:3417 with -Os -g -mstringop-strategy=libcall -freorder-blocks-algorithm=simple
- From: "jgreenhalgh at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 28 Nov 2016 18:28:41 +0000
- Subject: [Bug rtl-optimization/78547] [7 Regression] ICE: in loc_cmp, at var-tracking.c:3417 with -Os -g -mstringop-strategy=libcall -freorder-blocks-algorithm=simple
- Auto-submitted: auto-generated
- References: <bug-78547-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78547
James Greenhalgh <jgreenhalgh at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |hjl at gcc dot gnu.org,
| |ienkovich at gcc dot gnu.org
--- Comment #2 from James Greenhalgh <jgreenhalgh at gcc dot gnu.org> ---
I'd be surprised if r238594 was the root cause, but it may have exposed
something latent. This revision changed the cost model for if conversion,
effectively disabling it in this testcase. You can emulate turning off
if-conversion for the testcase with -fno-if-conversion on the command line.
Adding that, you can continue the bisect further back until r237647 which looks
more probable given the testcase body.
I'm now compiling with:
-Os -g -mstringop-strategy=libcall -freorder-blocks-algorithm=simple
-fdump-rtl-all-all -fno-if-conversion
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue Jun 21 14:24:31 2016 +0000
Convert V1TImode register to TImode in debug insn
TImode register referenced in debug insn can be converted to V1TImode
by scalar to vector optimization. After converting a TImode register
to V1TImode, we need to check all debug insns on its use chain to
convert the V1TImode register to SUBREG TImode.
gcc/
2016-06-21 H.J. Lu <hongjiu.lu@intel.com>
Ilya Enkovich <ilya.enkovich@intel.com>
PR target/71549
* config/i386/i386.c (timode_scalar_chain::fix_debug_reg_uses):
New member function to convert V1TImode register to SUBREG
TImode in debug insn.
(timode_scalar_chain::convert_insn): Call fix_debug_reg_uses
after changing register mode to V1TImode.
gcc/testsuite/
2016-06-21 H.J. Lu <hongjiu.lu@intel.com>
PR target/71549
* gcc.target/i386/pr71549.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@237647