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[Bug target/78458] [7 Regression] LRA ICE building libgcc for powerpc-linux-gnuspe e500v2
- From: "bergner at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Tue, 22 Nov 2016 21:26:45 +0000
- Subject: [Bug target/78458] [7 Regression] LRA ICE building libgcc for powerpc-linux-gnuspe e500v2
- Auto-submitted: auto-generated
- References: <bug-78458-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78458
--- Comment #9 from Peter Bergner <bergner at gcc dot gnu.org> ---
The IFmode usage is coming from HARD_REGNO_CALLER_SAVE_MODE(8, 2, TFmode)
returning IFmode, which comes from choose_hard_reg_mode (8, 2, false). As a
quick hack, I modified HARD_REGNO_CALLER_SAVE_MODE() to instead return TFmode,
and it didn't ICE.
I'm testing the following patch (which is a little more general) on a
powerpc64le-linux bootstrap to see if this survives.
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h (revision 241976)
+++ gcc/config/rs6000/rs6000.h (working copy)
@@ -1279,9 +1279,11 @@ enum data_align { align_abi, align_opt,
enough space to account for vectors in FP regs. However, TFmode/TDmode
should not use VSX instructions to do a caller save. */
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)
\
- (TARGET_VSX \
- && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE))
\
- && FP_REGNO_P (REGNO) \
+ (NREGS <= rs6000_hard_regno_nregs[MODE][REGNO] \
+ ? MODE \
+ : TARGET_VSX
\
+ && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \
+ && FP_REGNO_P (REGNO) \
? V2DFmode \
: TARGET_E500_DOUBLE && (MODE) == SImode \
? SImode \