This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug rtl-optimization/78378] [5/6/7 Regression] wrong code when combining shift + mult + zero_extend
- From: "jakub at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Wed, 16 Nov 2016 17:48:29 +0000
- Subject: [Bug rtl-optimization/78378] [5/6/7 Regression] wrong code when combining shift + mult + zero_extend
- Auto-submitted: auto-generated
- References: <bug-78378-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78378
--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Scratch that, I've missed there the 8 SUBREG_BYTE. That one is fine.
What is wrong is combine_simplify_rtx turning
(set (reg:SI 99 [ x ])
(and:SI (subreg:SI (truncate:HI (lshiftrt:TI (mult:TI (zero_extend:TI
(reg:DI 96))
(zero_extend:TI (reg:DI 98)))
(const_int 64 [0x40]))) 0)
(const_int 65535 [0xffff])))
into
(set (reg:SI 99 [ x ])
(zero_extend:SI (mult:HI (subreg:HI (reg:DI 96) 0)
(subreg:HI (reg:DI 98) 0))))