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[Bug rtl-optimization/78378] New: [5/6/7 Regression] wrong code when combining shift + mult + zero_extend


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78378

            Bug ID: 78378
           Summary: [5/6/7 Regression] wrong code when combining shift +
                    mult + zero_extend
           Product: gcc
           Version: 7.0
            Status: UNCONFIRMED
          Keywords: wrong-code
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: zsojka at seznam dot cz
  Target Milestone: ---
              Host: x86_64-pc-linux-gnu
            Target: x86_64-pc-linux-gnu
             Build: x86_64-pc-linux-gnu

Created attachment 40056
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40056&action=edit
reduced testcase

Output:
$ x86_64-pc-linux-gnu-gcc -O2 testcase.c && ./a.out 
Aborted

$ x86_64-pc-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-trunk-242408-checking-yes-rtl-df-extra-nographite-amd64/bin/x86_64-pc-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-242408-checking-yes-rtl-df-extra-nographite-amd64/bin/../libexec/gcc/x86_64-pc-linux-gnu/7.0.0/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--without-cloog --without-ppl --without-isl --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=x86_64-pc-linux-gnu
--with-ld=/usr/bin/x86_64-pc-linux-gnu-ld
--with-as=/usr/bin/x86_64-pc-linux-gnu-as --disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-242408-checking-yes-rtl-df-extra-nographite-amd64
Thread model: posix
gcc version 7.0.0 20161115 (experimental) (GCC) 

Only x86_64-pc-linux-gnu{,x32} seems to be affected.
i686-pc-linux-gnu, powerpc{,64}-unknown-linux-gnu,
sparc{,64}-unknown-linux-gnu, aarch64-unknown-linux-gnu,
armv7a-softfp-linux-gnueabi, armv7a-hardfloat-linux-gnueabi do not have this
problem.


.combine shows that several complex instructions are combined to one:

...
Trying 6, 7, 9 -> 10:
Successfully matched this instruction:
(set (reg:SI 99 [ xD.1799 ])
    (const_int 0 [0]))
allowing combination of insns 6, 7, 9 and 10
original costs 4 + 4 + 32 + 4 = 44
replacement cost 4
...

which is probably wrong. I don't know if the "(const_int 0 [0])" in fact
represents an unhandled combine failure.

Tested revisions:
r242408 - FAIL
6-branch r242077 - FAIL
5-branch r242124 - FAIL
4_9-branch r239063 - FAIL
4_8-branch r224828 - FAIL
4_7-branch r211571 - FAIL
4_6-branch r197894 - FAIL (maybe first version where 4 instructions can be
combined?)
4_5-branch r189152 - OK
4_4-branch r185318 - OK

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