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[Bug rtl-optimization/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0
- From: "bernd.edlinger at hotmail dot de" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 20 Oct 2016 05:50:31 +0000
- Subject: [Bug rtl-optimization/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0
- Auto-submitted: auto-generated
- References: <bug-78041-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
--- Comment #5 from Bernd Edlinger <bernd.edlinger at hotmail dot de> ---
(In reply to Wilco from comment #4)
> However dealing with partial overlaps is complex so maybe the best option
> would be to add alternatives to <shift>di3_neon to either allow full overlap
> "r 0 X X X" or no overlap "&r r X X X". The shift code works with full
> overlap.
That sounds like a good idea.
Then this condition in <shift>di3_neon could go away too:
&& (!reg_overlap_mentioned_p (operands[0], operands[1])
|| REGNO (operands[0]) == REGNO (operands[1])))