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[Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos
- From: "meissner at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 14 Apr 2016 20:13:39 +0000
- Subject: [Bug target/70640] IEEE 128-bit floating point negative/abs has two thinkos
- Auto-submitted: auto-generated
- References: <bug-70640-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70640
Michael Meissner <meissner at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|REOPENED |RESOLVED
Resolution|--- |FIXED
--- Comment #5 from Michael Meissner <meissner at gcc dot gnu.org> ---
After I applied the fix for PR 70640, one the regression testers reported the
test as an error. This system is a power7 system that does not have an
asembler that understands the power8/power9 instructions. This means that
-mcpu=power8 will only generate power7 code.
The difference for this test is that on power7, it generates a vspltisw
instruciton to create a register with all 1's set, while on power8 it generates
xxlorc instead (vspltisw is restricted to the Altivec registers, while xxlorc
can target all VSX registers, so it is preferred for power8 code).
Test case updated in subversion id 234988.