[Bug target/65578] FAIL: gcc.target/arm/builtin-bswap-1.c (test for excess errors)

["ktkachov at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65578

--- Comment #5 from ktkachov at gcc dot gnu.org ---
These rev* instructions have both Thumb1 (16-bit) and Thumb2 as well as ARM
state forms and ideally we'd want to test them all.
Currently, the test is setup to only test the Thumb1 and ARM state generation
since it adds -march=armv6 which supports only Thumb1 and ARM state.

The Thumb1 codegen fails if the the toolchain is also configured for hard
float.
Adding -mfloat-abi=soft[fp] would fix the test but we wouldn't be testing the
generation of these instructions for Thumb2.

IMO this test tries to do to much in single file by conditionally scanning for
the conditional forms of the instructions depending on whether or not this is
thumb.

So I suggest bump the architecture required for this to arm_arch_v6t2 and
remove all the scan-assembler tests gated on  { ! arm_nothumb } because now
Thumb2 will support the conditional forms (Thumb1 has no conditional
execution).

Then write a separate test that contains only the unconditional bswap calls and
compile that specifically for thumb1 i.e. for arm_arch_v6 with -mthumb and
-mfloat-abi=softfp and scan-assembler tests for the unconditional forms of the
rev* instructions.

What do you think?