[Bug target/69442] [6 Regression] wrong code with -Og and 64bit modulo @ armv7a

["ktkachov at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69442

--- Comment #4 from ktkachov at gcc dot gnu.org ---
The differences between various -mtune options come out during expand phase,
where the expansion for the mod operation is different.
For example, for -mtune=cortex-a9 the code doesn't abort and the assembly for
foo is:
foo:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        @ link register save eliminated.
        push    {r4, r5}
        mvn     ip, r0, lsr #16
        mvn     ip, ip, lsl #16
        subs    r4, r2, #255
        sbc     r5, r3, #0
        mvn     r2, #24
        mov     r3, #0
        movt    r3, 65535
        cmp     r5, r3
        cmpeq   r4, r2
        movcs   r3, #1
        movcc   r3, #0
        mov     r0, r3
        mov     r1, #0
        vmov    d16, r0, r1     @ int
        vshl.u64        d17, d16, #16
        vsub.i64        d17, d16, d17
        vshl.u64        d17, d17, #27
        vsub.i64        d17, d17, d16
        vshl.u64        d17, d17, #2
        vadd.i64        d17, d17, d16
        vshl.u64        d16, d17, #3
        vmov    r2, r3, d16     @ int
        subs    r2, r2, r0
        sbc     r3, r3, r1
        mov     r0, r2
        mov     r1, r3
        subs    r0, r4, r0
        sbc     r1, r5, r1
        adds    r0, r0, ip
        adc     r1, r1, #0
        pop     {r4, r5}
        bx      lr

but for -mtune=cortex-a8 we have a completely different  expansion of mod that
seems to be misoptimised or something:
foo:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        @ link register save eliminated.
        mvn     ip, r0, lsr #16
        mvn     ip, ip, lsl #16
        subs    r2, r2, #255
        sbc     r3, r3, #0
        mvn     r0, #24
        mov     r1, #0
        movt    r1, 65535
        cmp     r3, r1
        cmpeq   r2, r0
        movcs   r1, #1
        movcc   r1, #0
        mvn     r0, #24
        umull   r0, r1, r1, r0
        subs    r0, r2, r0
        sbc     r1, r3, r1
        adds    r0, r0, ip
        adc     r1, r1, #0
        bx      lr