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[Bug target/69135] [5/6 Regression][ARM] instruction cannot be conditional -- `vcvtpne.s32.f32 s0,s0'
- From: "ktkachov at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Tue, 19 Jan 2016 14:30:55 +0000
- Subject: [Bug target/69135] [5/6 Regression][ARM] instruction cannot be conditional -- `vcvtpne.s32.f32 s0,s0'
- Auto-submitted: auto-generated
- References: <bug-69135-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69135
--- Comment #5 from ktkachov at gcc dot gnu.org ---
Author: ktkachov
Date: Tue Jan 19 14:30:23 2016
New Revision: 232566
URL: https://gcc.gnu.org/viewcvs?rev=232566&root=gcc&view=rev
Log:
[ARM] PR target/69135: Mark ARMv8 vcvt instructions as unconditional
PR target/69135
* config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): Set "conds"
attribute to unconditional. Remove %? from output template.
* gcc.target/arm/pr69135_1.c: New test.
Added:
trunk/gcc/testsuite/gcc.target/arm/pr69135_1.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/arm/vfp.md
trunk/gcc/testsuite/ChangeLog