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[Bug target/68543] [AArch64] Implement overflow arithmetic standard names {u,}{add,sub,mul}v4<mode> and/or negv3<mode>
- From: "ktkachov at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Fri, 11 Dec 2015 14:21:27 +0000
- Subject: [Bug target/68543] [AArch64] Implement overflow arithmetic standard names {u,}{add,sub,mul}v4<mode> and/or negv3<mode>
- Auto-submitted: auto-generated
- References: <bug-68543-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68543
--- Comment #3 from ktkachov at gcc dot gnu.org ---
After some discussion on IRC, WORD_REGISTER_OPERATIONS seems wrong for aarch64
since 32-bit operations i.e. in SImode operate like normal 32-bit operations
because they use the 32-bit W-form of the registers. Thus they don't behave
like word_mode operations, because word_mode is DImode on aarch64.
So we may want to look at implementing the standard names after all