This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/65952] [AArch64] Will not vectorize storing induction of pointer addresses for LP64
- From: "vekumar at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 20 Jul 2015 10:30:16 +0000
- Subject: [Bug target/65952] [AArch64] Will not vectorize storing induction of pointer addresses for LP64
- Auto-submitted: auto-generated
- References: <bug-65952-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65952
--- Comment #10 from vekumar at gcc dot gnu.org ---
With the patch I get
loop:
adrp x0, array
ldr q1, .LC0
ldr q2, .LC1
adrp x1, ptrs
add x1, x1, :lo12:ptrs
ldr x0, [x0, #:lo12:array]
dup v0.2d, x0
add v1.2d, v0.2d, v1.2d <== vectorized
add v0.2d, v0.2d, v2.2d <== vectorized
str q1, [x1]
str q0, [x1, 16]
ret
.size loop, .-loop
.align 4
.LC0:
.xword 0
.xword 16
.align 4
.LC1:
.xword 32
.xword 48