[Bug rtl-optimization/65651] New: Redundant cmp with zero instruction in loop for x86 target.

["ysrumyan at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65651

            Bug ID: 65651
           Summary: Redundant cmp with zero instruction in loop for x86
                    target.
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: ysrumyan at gmail dot com

Compile attached bad.c with "-O2" option only we can see that redundant cmp
with zero instruction is generated:
    subl    %r9d, %eax
    cmpl    $0, %eax
    je    .L10
 but for slightly changed good.c there is no such redundancy:
    subl    %r9d, %eax
    je    .L10

The problem phase is combine.
For good case it does combining:
Trying 37 -> 38:
Successfully matched this instruction:
(parallel [
        (set (reg:CCZ 17 flags)
            (compare:CCZ (minus:SI (reg:SI 121 [ D.2002 ])
                    (reg/v:SI 115 [ med ]))
                (const_int 0 [0])))
        (set (reg/v:SI 101 [ n ])
            (minus:SI (reg:SI 121 [ D.2002 ])
                (reg/v:SI 115 [ med ])))
    ])
allowing combination of insns 37 and 38
original costs 4 + 4 = 8
replacement cost 0
but for bad case it is not performed:
Trying 37 -> 38:
Failed to match this instruction:
(set (reg:CC 17 flags)
    (compare:CC (minus:SI (reg:SI 120 [ D.2006 ])
            (reg/v:SI 114 [ med ]))
        (const_int 0 [0])))

Note that this test-case extracted from one of hot loop in bzip2 (mainQSort3).