This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/65505] [5 Regression][SH] ICE in sh_disp_addr_displacement
- From: "olegendo at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Sat, 21 Mar 2015 15:24:25 +0000
- Subject: [Bug target/65505] [5 Regression][SH] ICE in sh_disp_addr_displacement
- Auto-submitted: auto-generated
- References: <bug-65505-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65505
--- Comment #1 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Created attachment 35084
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=35084&action=edit
possible patch
The problem here is that sh_disp_addr_displacement gets an address that looks
like:
(plus:SI (subreg:SI (reg:DI ...) ..) (const_int ...)
The predicates displacement_mem_operand and simple_mem_operand use
arith_reg_operand to match the register operand. This also matches sign_extend
and subreg, which is not handled by constraints such as Sdd.
This is a latent problem, although it seems it never triggered on 4.8 and 4.9.
If we allow subregs for the register operand of address expressions, things get
a bit hairy. Additional checks need to be added everywhere to make sure that
the subreg is indeed a register operand and not e.g. subreg (mem ...).
Disallowing subregs in address expressions seems easier in this case.
The attached patch fixes the problem.