[Bug target/65105] [i386] XMM registers are not used for 64bit computations on 32bit target

["enkovich.gnu at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65105

--- Comment #2 from Ilya Enkovich <enkovich.gnu at gmail dot com> ---
For this test I see 'plus' and 'minus' ops have DI mode until RA and get GPR
pairs:

(insn 12 35 13 2 (parallel [
            (set (reg:DI 0 ax [orig:98 D.1945 ] [98])
                (plus:DI (reg:DI 0 ax [orig:97 D.1945 ] [97])
                    (reg:DI 2 cx [orig:96 D.1945 ] [96])))
            (clobber (reg:CC 17 flags))
        ]) test.c:4 215 {*adddi3_doubleword}
     (nil))
(insn 13 12 18 2 (parallel [
            (set (reg:DI 0 ax [orig:95 D.1945 ] [95])
                (minus:DI (reg:DI 0 ax [orig:98 D.1945 ] [98])
                    (reg/v:DI 4 si [orig:94 z ] [94])))
            (clobber (reg:CC 17 flags))
        ]) test.c:4 259 {*subdi3_doubleword}
     (nil))

'ior' and 'and' use SI mode and subregs starting from expand.