[Bug target/63949] Aarch64 instruction combiner does not optimize subsi_sxth function as expected (gcc.target/aarch64/extend.c fails)

["vekumar at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63949

--- Comment #10 from vekumar at gcc dot gnu.org ---
(In reply to Segher Boessenkool from comment #9)
> A MULT by a constant power of 2 is not canonical RTL (well, not what
> simplify_rtx would give you); combine shouldn't generate this.


In that case we think, we need to fix this heuristic which assumes "MEM"
operation when we encounter a MINUS RTX in "make_compound_operation".


/* Select the code to be used in recursive calls.  Once we are inside an
      address, we stay there.  If we have a comparison, set to COMPARE,
      but once inside, go back to our default of SET.  */

   next_code = (code == MEM ? MEM
                : ((code == PLUS || code == MINUS)
                   && SCALAR_INT_MODE_P (mode)) ? MEM
                : ((code == COMPARE || COMPARISON_P (x))
                   && XEXP (x, 1) == const0_rtx) ? COMPARE
                : in_code == COMPARE ? SET : in_code);


 And later on make_compound_operation converts shift pattern to Mul.

 case ASHIFT:
      /* Convert shifts by constants into multiplications if inside
         an address.  */
      if (in_code == MEM && CONST_INT_P (XEXP (x, 1))
          && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT
          && INTVAL (XEXP (x, 1)) >= 0
          && SCALAR_INT_MODE_P (mode))
        {